From patchwork Wed Aug 22 08:44:23 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10861 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2237D23E56 for ; Wed, 22 Aug 2012 08:44:33 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id E5A3DA182AF for ; Wed, 22 Aug 2012 08:44:21 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id j38so642474iad.11 for ; Wed, 22 Aug 2012 01:44:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:mime-version:content-type :x-gm-message-state; bh=Kkbr3WbWbKKNUbeTuQQj67VbVbrvlmQXTRKYXi25MdY=; b=R1nTtdthAWn018eM7wjlYwdaODNwznIl3JUT9PhnVPFsGGgjX24j5AYUJLbxgi5Tc6 X74svYpUNHdxLHdr0mi3Xv29uUZxeNGHJlIF4W73I9ofjsM4JOIfxam/i2VY96PZ9esv vuPNBe4D3firCg27o5ixHN170DTSvxMShyucLI7irZqvkXdGfPdzoNuepvfZWq5g+zfU SwmjLEGdEXzy90f4PUdyZClQlZNC6xom11qnA9wnLHp3GlLW9SfVOQMLpx8cgqjHVmxA hpj2uGC10b6R6XK0F+AH9yXYiMwcJpmofX9QYA9XabL++04KqI2SrbDhbpkqXakubAxi Wymg== Received: by 10.50.87.164 with SMTP id az4mr1266619igb.43.1345625072625; Wed, 22 Aug 2012 01:44:32 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.232 with SMTP id ex8csp190153igc; Wed, 22 Aug 2012 01:44:31 -0700 (PDT) Received: by 10.14.1.9 with SMTP id 9mr17299137eec.9.1345625071451; Wed, 22 Aug 2012 01:44:31 -0700 (PDT) Received: from eu1sys200aog112.obsmtp.com (eu1sys200aog112.obsmtp.com. [207.126.144.133]) by mx.google.com with SMTP id z41si2331660eep.79.2012.08.22.01.44.27 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 22 Aug 2012 01:44:31 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.133 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.133; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.133 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob112.postini.com ([207.126.147.11]) with SMTP ID DSNKUDSb66uEZ0BIDHG0u+/85Q7yWh6wTTyn@postini.com; Wed, 22 Aug 2012 08:44:31 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B71E9D2; Wed, 22 Aug 2012 08:44:26 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6ADA52729; Wed, 22 Aug 2012 08:44:26 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 69DFCA8065; Wed, 22 Aug 2012 10:44:22 +0200 (CEST) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.83.0; Wed, 22 Aug 2012 10:44:26 +0200 From: Linus Walleij To: , , Samuel Ortiz Cc: Etienne Carriere , Linus Walleij Subject: [PATCH 6/7] mfd/stmpe: MASK_ON_SUSPEND Date: Wed, 22 Aug 2012 10:44:23 +0200 Message-ID: <1345625063-5784-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQkplRjOsxc9yXqsujUEzkpLysx81yKuTXdbjJrfvl6SgK7eT2I5tgVinQhbQv5CZDkGqamQ From: Etienne Carriere ux500 machines performs pins (GPIO) reconfiguration when entering in the suspended mode. This reconfiguration aims at reaching an ultra low power HW configuration. Due to this HW reconfiguration, some HW devices can change of HW state and have their output signals at level that could generate IRQs. If the non-wakeup IRQs are disabled but not yet masked (delayed interrupt disable feature from the generic irq layer), effective interrupts reach the system only because the system attempt to enter the suspended mode. To prevent such IRQs to trig, all irq chips embedded in ux500 platform should enable their IRQCHIP_MASK_ON_SUSPEND flag. Cc: Samuel Ortiz Signed-off-by: Etienne Carriere Signed-off-by: Linus Walleij --- drivers/gpio/gpio-stmpe.c | 1 + drivers/mfd/stmpe.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c index dce3472..2195abc 100644 --- a/drivers/gpio/gpio-stmpe.c +++ b/drivers/gpio/gpio-stmpe.c @@ -223,6 +223,7 @@ static struct irq_chip stmpe_gpio_irq_chip = { .irq_mask = stmpe_gpio_irq_mask, .irq_unmask = stmpe_gpio_irq_unmask, .irq_set_type = stmpe_gpio_irq_set_type, + .flags = IRQCHIP_MASK_ON_SUSPEND, }; static irqreturn_t stmpe_gpio_irq(int irq, void *dev) diff --git a/drivers/mfd/stmpe.c b/drivers/mfd/stmpe.c index 2dd8d49..846b9c8 100644 --- a/drivers/mfd/stmpe.c +++ b/drivers/mfd/stmpe.c @@ -851,6 +851,7 @@ static struct irq_chip stmpe_irq_chip = { .irq_bus_sync_unlock = stmpe_irq_sync_unlock, .irq_mask = stmpe_irq_mask, .irq_unmask = stmpe_irq_unmask, + .flags = IRQCHIP_MASK_ON_SUSPEND, }; static int __devinit stmpe_irq_init(struct stmpe *stmpe)