From patchwork Wed Oct 24 12:13:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 12463 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 82DA723EC8 for ; Wed, 24 Oct 2012 12:14:01 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 20366A18C10 for ; Wed, 24 Oct 2012 12:14:01 +0000 (UTC) Received: by mail-ie0-f180.google.com with SMTP id e10so498921iej.11 for ; Wed, 24 Oct 2012 05:14:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:x-gm-message-state; bh=N1yHmFIkdmA3IxFvQ263LFot4G7DXNKwdKfuv7Pmpc0=; b=GsVWF1IJ0ouGPphqrD08fqTs1YYAfw/z2c8Un0zQcNi4nk/eMMMCOu2ltboIEId1pt wcAsY3ONICLazL+8CGyDaZwqstKiwdaWv4cBNjqtiWd20h7Us82kQvVwS39tkMSNGjUZ CKwpq+spu5toYcDX2DgTwAr6pE4g1XGhf/UQ5n3Qjh59KzUGKekI7hGcNClHVL+GQW6I 65AzYQxEbTNqPzjeVISp+ENYJzCa4nw1yg7F/Whe7HNJczhgexrfn1+0rEg0CrvfdeZn M+BuJOQr/leQGroy+0sQo0nWYTGAWRfYuc0fpf4UUw9+GJIFXX9s1J7W0MsokX0vh6Zi iHFA== Received: by 10.50.46.226 with SMTP id y2mr2056423igm.62.1351080840510; Wed, 24 Oct 2012 05:14:00 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp604015igt; Wed, 24 Oct 2012 05:13:59 -0700 (PDT) Received: by 10.14.173.67 with SMTP id u43mr21296282eel.27.1351080838975; Wed, 24 Oct 2012 05:13:58 -0700 (PDT) Received: from eu1sys200aog115.obsmtp.com (eu1sys200aog115.obsmtp.com [207.126.144.139]) by mx.google.com with SMTP id a9si5406818eeo.102.2012.10.24.05.13.52 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 24 Oct 2012 05:13:58 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.139 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) client-ip=207.126.144.139; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.139 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) smtp.mail=ulf.hansson@stericsson.com Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob115.postini.com ([207.126.147.11]) with SMTP ID DSNKUIfbfxK2+h9RSvK9VRfr7gV0YDiNlV9m@postini.com; Wed, 24 Oct 2012 12:13:58 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 300DBDB; Wed, 24 Oct 2012 12:13:47 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C19982C07; Wed, 24 Oct 2012 12:13:47 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id D137224C2F4; Wed, 24 Oct 2012 14:13:40 +0200 (CEST) Received: from steludxu1397.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.83.0; Wed, 24 Oct 2012 14:13:47 +0200 From: Ulf Hansson To: , Mike Turquette Cc: STEricsson , Linus Walleij , Alessandro Rubini , Lee Jones , Philippe Begnic , Rickard Andersson , Ulf Hansson Subject: [PATCH 1/2] clk: ux500: Register mtu apb_pclocks Date: Wed, 24 Oct 2012 14:13:40 +0200 Message-ID: <1351080821-18660-2-git-send-email-ulf.hansson@stericsson.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1351080821-18660-1-git-send-email-ulf.hansson@stericsson.com> References: <1351080821-18660-1-git-send-email-ulf.hansson@stericsson.com> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQkThZlkvnEF/eVW95lUeIV6mrzzb+xhuFXI2PbOyNM78ItDTSYXGBDfPp/rIzdkr32tsd58 From: Ulf Hansson Signed-off-by: Ulf Hansson --- drivers/clk/ux500/u8500_clk.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index 4ec6f60..8ca3227 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c @@ -160,12 +160,6 @@ void u8500_clk_init(void) clk = clk_reg_prcmu_gate("uiccclk", NULL, PRCMU_UICCCLK, CLK_IS_ROOT); clk_register_clkdev(clk, NULL, "uicc"); - /* - * FIXME: The MTU clocks might need some kind of "parent muxed join" - * and these have no K-clocks. For now, we ignore the missing - * connection to the corresponding P-clocks, p6_mtu0_clk and - * p6_mtu1_clk. Instead timclk is used which is the valid parent. - */ clk = clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, CLK_IS_ROOT); clk_register_clkdev(clk, NULL, "mtu0"); clk_register_clkdev(clk, NULL, "mtu1"); @@ -402,8 +396,11 @@ void u8500_clk_init(void) clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", U8500_CLKRST6_BASE, BIT(6), 0); + clk_register_clkdev(clk, "apb_pclk", "mtu0"); + clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", U8500_CLKRST6_BASE, BIT(7), 0); + clk_register_clkdev(clk, "apb_pclk", "mtu1"); /* PRCC K-clocks *