From patchwork Tue May 14 09:26:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 16891 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-qa0-f69.google.com (mail-qa0-f69.google.com [209.85.216.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 100E3238F1 for ; Tue, 14 May 2013 09:28:42 +0000 (UTC) Received: by mail-qa0-f69.google.com with SMTP id ih17sf207110qab.4 for ; Tue, 14 May 2013 02:28:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:mime-version:x-beenthere:x-received:received-spf :x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :x-gm-message-state:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-google-group-id:list-post:list-help:list-archive:list-unsubscribe; bh=IrxLSYhVG/XywutG+A0RQI6Xz0DjUdSjY/VHiXumvXc=; b=RvsvDXKYybPBjmri/Xx31XdgICjJWQdcQGAZsNk4GtOmWj58NbmuUJ+rE58CGnLHCt WRsL2Ey7MI+1YAaoGq4h0s2PtSaudVQtPTmrAiEE2IOTyq44rIBL8qjn00emdD62pjNX RAW8pk8LMOFLUYTUsn+3zbqYojkkUoJRbd2nri7k8Sr9kE3vC1FfgQwvj961UbbVWDQf Kq+oXvBfbJaEQylUR8DuRC5BrBBGyZ1fEH9OhVE9i2a8Q2E9xi9MT3zxbZySY/Nyl3r1 6o3GbEVpuRsOqDlngD01tBIHk5VqTBYqrcCYv4OP9V4xreNUdL/33f9jjyyc+jxVJzsO RTJA== X-Received: by 10.224.42.141 with SMTP id s13mr20847142qae.3.1368523687423; Tue, 14 May 2013 02:28:07 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.48.233 with SMTP id p9ls967qen.60.gmail; Tue, 14 May 2013 02:28:07 -0700 (PDT) X-Received: by 10.52.165.166 with SMTP id yz6mr5919452vdb.6.1368523687105; Tue, 14 May 2013 02:28:07 -0700 (PDT) Received: from mail-vc0-f169.google.com (mail-vc0-f169.google.com [209.85.220.169]) by mx.google.com with ESMTPS id ad7si4557982vdc.133.2013.05.14.02.28.07 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 14 May 2013 02:28:07 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.169; Received: by mail-vc0-f169.google.com with SMTP id kw10so273448vcb.14 for ; Tue, 14 May 2013 02:28:07 -0700 (PDT) X-Received: by 10.58.173.36 with SMTP id bh4mr21236668vec.9.1368523686945; Tue, 14 May 2013 02:28:06 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.217.15 with SMTP id hk15csp53563vcb; Tue, 14 May 2013 02:28:06 -0700 (PDT) X-Received: by 10.68.13.168 with SMTP id i8mr33259959pbc.86.1368523685347; Tue, 14 May 2013 02:28:05 -0700 (PDT) Received: from mail-pd0-f174.google.com (mail-pd0-f174.google.com [209.85.192.174]) by mx.google.com with ESMTPS id xx2si14006992pac.248.2013.05.14.02.28.04 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 14 May 2013 02:28:05 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.192.174 is neither permitted nor denied by best guess record for domain of anup.patel@linaro.org) client-ip=209.85.192.174; Received: by mail-pd0-f174.google.com with SMTP id u10so266742pdi.33 for ; Tue, 14 May 2013 02:28:04 -0700 (PDT) X-Received: by 10.66.122.130 with SMTP id ls2mr16113162pab.128.1368523684803; Tue, 14 May 2013 02:28:04 -0700 (PDT) Received: from pnqlab006.amcc.com ([182.72.18.82]) by mx.google.com with ESMTPSA id aj2sm17551506pbc.1.2013.05.14.02.28.01 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 14 May 2013 02:28:03 -0700 (PDT) From: Anup Patel To: linux-arm-kernel@lists.infradead.org Cc: Catalin Marinas , linaro-kernel@lists.linaro.org, patches@linaro.org, Anup Patel , Sukanto Ghosh Subject: [PATCH] arm64: mm: Fix operands of clz in __flush_dcache_all Date: Tue, 14 May 2013 14:56:54 +0530 Message-Id: <1368523614-22484-1-git-send-email-anup.patel@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQkvt3gW7Jx5YM/I0mWwi7h67p3spETwwG11GtG5lZqCs8IGjlK1Om9PbhjInFXiRcO09vWO X-Original-Sender: anup.patel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Sukanto Ghosh The format of the lower 32-bits of the 64-bit operand to 'dc cisw' is unchanged from ARMv7 architecture and the upper bits are RES0. This implies that the 'way' field of the operand of 'dc cisw' occupies the bit-positions [31 .. (32-A)]. Due to the use of 64-bit extended operands to 'clz', the existing implementation of __flush_dcache_all is incorrectly placing the 'way' field in the bit-positions [63 .. (64-A)]. Signed-off-by: Sukanto Ghosh Tested-by: Anup Patel --- arch/arm64/mm/cache.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S index abe69b8..48a3860 100644 --- a/arch/arm64/mm/cache.S +++ b/arch/arm64/mm/cache.S @@ -52,7 +52,7 @@ loop1: add x2, x2, #4 // add 4 (line length offset) mov x4, #0x3ff and x4, x4, x1, lsr #3 // find maximum number on the way size - clz x5, x4 // find bit position of way size increment + clz w5, w4 // find bit position of way size increment mov x7, #0x7fff and x7, x7, x1, lsr #13 // extract max number of the index size loop2: