From patchwork Thu May 30 01:14:30 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 17280 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ye0-f198.google.com (mail-ye0-f198.google.com [209.85.213.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 9380C25D81 for ; Thu, 30 May 2013 01:14:58 +0000 (UTC) Received: by mail-ye0-f198.google.com with SMTP id m14sf7438923yen.9 for ; Wed, 29 May 2013 18:14:58 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:x-beenthere:x-forwarded-to:x-forwarded-for :delivered-to:from:to:cc:subject:date:message-id:x-mailer :x-gm-message-state:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-google-group-id:list-post:list-help:list-archive:list-unsubscribe; bh=QqworYhsXJsBbmxu8MHgcXk8Jd4vOKWLDW8Engk50a0=; b=R+VvxkbMVm2PHdzSyrf3zZ8U3Aa+WpNBMx5za/+DyO3aut9vDgl7U0UrZSwkbku9yY fy8wzO5OCSAg59JQAtPg+LYf3U12ZHEQgrhWvHUvUF7XJsVrqg7TLq+9TMwMxsOSIoOb QOQ9c4fx+SULJrZPbyvhq7v0YkH6nZjt7jttvQv8I0h59pZXiTuoc7+LXtwY019egHIP kFGc1uspiBehJgzTihZnRK+Tq+xxJkfG+TkW6OgvF3lZCa35ITao4KLN1gwgtnNz9mof QxrPkTrTg0RFixzYF3P+Ol98nGPwMwG0bNKrvi2pOjehoZKCA0MiYU2nWhMrnQDtYRAx 3Rgw== X-Received: by 10.236.192.131 with SMTP id i3mr2741280yhn.29.1369876498115; Wed, 29 May 2013 18:14:58 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.60.231 with SMTP id k7ls214424qer.22.gmail; Wed, 29 May 2013 18:14:57 -0700 (PDT) X-Received: by 10.58.69.101 with SMTP id d5mr3328870veu.52.1369876497705; Wed, 29 May 2013 18:14:57 -0700 (PDT) Received: from mail-vb0-x232.google.com (mail-vb0-x232.google.com [2607:f8b0:400c:c02::232]) by mx.google.com with ESMTPS id qu17si3844070vec.15.2013.05.29.18.14.57 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 29 May 2013 18:14:57 -0700 (PDT) Received-SPF: neutral (google.com: 2607:f8b0:400c:c02::232 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=2607:f8b0:400c:c02::232; Received: by mail-vb0-f50.google.com with SMTP id w16so6680675vbb.23 for ; Wed, 29 May 2013 18:14:57 -0700 (PDT) X-Received: by 10.59.13.193 with SMTP id fa1mr732742ved.56.1369876497582; Wed, 29 May 2013 18:14:57 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.229.199 with SMTP id jj7csp36091vcb; Wed, 29 May 2013 18:14:56 -0700 (PDT) X-Received: by 10.68.179.194 with SMTP id di2mr5277023pbc.214.1369876495862; Wed, 29 May 2013 18:14:55 -0700 (PDT) Received: from mail-pb0-x234.google.com (mail-pb0-x234.google.com [2607:f8b0:400e:c01::234]) by mx.google.com with ESMTPS id mr7si27922723pbb.287.2013.05.29.18.14.55 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 29 May 2013 18:14:55 -0700 (PDT) Received-SPF: neutral (google.com: 2607:f8b0:400e:c01::234 is neither permitted nor denied by best guess record for domain of christoffer.dall@linaro.org) client-ip=2607:f8b0:400e:c01::234; Received: by mail-pb0-f52.google.com with SMTP id um15so10019912pbc.25 for ; Wed, 29 May 2013 18:14:55 -0700 (PDT) X-Received: by 10.68.0.66 with SMTP id 2mr5544546pbc.15.1369876495076; Wed, 29 May 2013 18:14:55 -0700 (PDT) Received: from localhost.localdomain (c-67-169-183-77.hsd1.ca.comcast.net. [67.169.183.77]) by mx.google.com with ESMTPSA id zs12sm42115549pab.0.2013.05.29.18.14.53 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 29 May 2013 18:14:54 -0700 (PDT) From: Christoffer Dall To: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, Russell King Cc: patches@linaro.org, linaro-kernel@lists.linaro.org, Christoffer Dall , Marc Zyngier Subject: [PATCH v3] ARM: KVM: mm: Get rid of L_PTE_USER ref from PAGE_S2_DEVICE Date: Wed, 29 May 2013 18:14:30 -0700 Message-Id: <1369876470-49540-1-git-send-email-christoffer.dall@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQm7w3ux7GwRVZEKAWlq14inF6d27Ioe6ea6M8cHegOfcBvYJ+QVatmMrE6Lh//zgSOR2QcM X-Original-Sender: christoffer.dall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c02::232 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , THe L_PTE_USER actually has nothing to do with stage 2 mappings and the L_PTE_S2_RDWR value sets the readable bit, which was what L_PTE_USER was used for before proper handling of stage 2 memory defines. Changelog: [v3]: Drop call to kvm_set_s2pte_writable in mmu.c [v2]: Change default mappings to be r/w instead of r/o, as per Marc Zyngier's suggestion. Cc: Marc Zyngier Signed-off-by: Christoffer Dall --- arch/arm/include/asm/pgtable.h | 2 +- arch/arm/kvm/mmu.c | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index 9bcd262..8afc60c 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -97,7 +97,7 @@ extern pgprot_t pgprot_s2_device; #define PAGE_HYP _MOD_PROT(pgprot_kernel, L_PTE_HYP) #define PAGE_HYP_DEVICE _MOD_PROT(pgprot_hyp_device, L_PTE_HYP) #define PAGE_S2 _MOD_PROT(pgprot_s2, L_PTE_S2_RDONLY) -#define PAGE_S2_DEVICE _MOD_PROT(pgprot_s2_device, L_PTE_USER | L_PTE_S2_RDONLY) +#define PAGE_S2_DEVICE _MOD_PROT(pgprot_s2_device, L_PTE_S2_RDWR) #define __PAGE_NONE __pgprot(_L_PTE_DEFAULT | L_PTE_RDONLY | L_PTE_XN | L_PTE_NONE) #define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_XN) diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c index 2f12e40..d80264c 100644 --- a/arch/arm/kvm/mmu.c +++ b/arch/arm/kvm/mmu.c @@ -485,7 +485,6 @@ int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa, for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) { pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE); - kvm_set_s2pte_writable(&pte); ret = mmu_topup_memory_cache(&cache, 2, 2); if (ret)