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[86.16.136.251]) by mx.google.com with ESMTPSA id d10sm15436140wik.0.2013.06.06.05.17.37 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 06 Jun 2013 05:17:38 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: arnd@arndb.de, linus.walleij@stericsson.com, srinidhi.kasagar@stericsson.com, Lee Jones Subject: [PATCH 05/33] ARM: ux500: Supply the GPIO clocks lookup to the DBX500 DT Date: Thu, 6 Jun 2013 13:16:53 +0100 Message-Id: <1370521041-32318-6-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1370521041-32318-1-git-send-email-lee.jones@linaro.org> References: <1370521041-32318-1-git-send-email-lee.jones@linaro.org> X-Gm-Message-State: ALoCoQlqJICteotrVIYq/GMys4isFSy4Rlaa+YqNOR7HOXQllnZAfiUGCRJUWDA0KZKw9vRCyAK9 X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Signed-off-by: Lee Jones --- arch/arm/boot/dts/dbx5x0.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index 18c5c27..928ef56 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi @@ -78,6 +78,8 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <0>; + + clocks = <&prcc_pclk 1 9>; }; gpio1: gpio@8012e080 { @@ -91,6 +93,8 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <1>; + + clocks = <&prcc_pclk 1 9>; }; gpio2: gpio@8000e000 { @@ -104,6 +108,8 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <2>; + + clocks = <&prcc_pclk 3 8>; }; gpio3: gpio@8000e080 { @@ -117,6 +123,8 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <3>; + + clocks = <&prcc_pclk 3 8>; }; gpio4: gpio@8000e100 { @@ -130,6 +138,8 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <4>; + + clocks = <&prcc_pclk 3 8>; }; gpio5: gpio@8000e180 { @@ -143,6 +153,8 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <5>; + + clocks = <&prcc_pclk 3 8>; }; gpio6: gpio@8011e000 { @@ -156,6 +168,8 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <6>; + + clocks = <&prcc_pclk 2 1>; }; gpio7: gpio@8011e080 { @@ -169,6 +183,8 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <7>; + + clocks = <&prcc_pclk 2 1>; }; gpio8: gpio@a03fe000 { @@ -182,6 +198,8 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <8>; + + clocks = <&prcc_pclk 6 1>; }; pinctrl {