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[128.107.239.233]) by mx.google.com with ESMTPSA id nj9sm41954402pbc.13.2013.08.13.00.12.49 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 13 Aug 2013 00:12:50 -0700 (PDT) From: Victor Kamensky To: linux-arm-kernel@lists.infradead.org Cc: ben.dooks@codethink.co.uk, steve.mcintyre@linaro.org, patches@linaro.org, linaro-kernel@lists.linaro.org, Victor Kamensky Subject: [PATCH] ARM: signal: sigreturn_codes should be endian neutral to work in BE8 Date: Tue, 13 Aug 2013 00:12:11 -0700 Message-Id: <1376377931-2262-1-git-send-email-victor.kamensky@linaro.org> X-Mailer: git-send-email 1.8.1.4 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: victor.kamensky@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.181 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , In case of BE8 kernel data is in BE order whereas code stays in LE order. sigreturn_codes array initializer need to use macros from to setup instructions code in endian neutral way. Problem was discovered during ltp testing of BE system: all rt_sig* tests failed. Tested against the same tests in both BE and LE modes. Signed-off-by: Victor Kamensky --- arch/arm/kernel/signal.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index ab33042..333a67f 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c @@ -20,25 +20,26 @@ #include #include #include +#include /* * For ARM syscalls, we encode the syscall number into the instruction. */ -#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) -#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) +#define SWI_SYS_SIGRETURN (__opcode_to_mem_arm(0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE))) +#define SWI_SYS_RT_SIGRETURN (__opcode_to_mem_arm(0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE))) /* * With EABI, the syscall number has to be loaded into r7. */ -#define MOV_R7_NR_SIGRETURN (0xe3a07000 | (__NR_sigreturn - __NR_SYSCALL_BASE)) -#define MOV_R7_NR_RT_SIGRETURN (0xe3a07000 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) +#define MOV_R7_NR_SIGRETURN (__opcode_to_mem_arm(0xe3a07000 | (__NR_sigreturn - __NR_SYSCALL_BASE))) +#define MOV_R7_NR_RT_SIGRETURN (__opcode_to_mem_arm(0xe3a07000 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))) /* * For Thumb syscalls, we pass the syscall number via r7. We therefore * need two 16-bit instructions. */ -#define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE)) -#define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) +#define SWI_THUMB_SIGRETURN (__opcode_to_mem_arm(0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE))) +#define SWI_THUMB_RT_SIGRETURN (__opcode_to_mem_arm(0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))) static const unsigned long sigreturn_codes[7] = { MOV_R7_NR_SIGRETURN, SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN,