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[92.224.198.1]) by mx.google.com with ESMTPSA id ya5sm15756249obc.1.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 19 Aug 2013 03:20:40 -0700 (PDT) From: Andre Przywara To: peter.pearse@arm.com, linus.walleij@linaro.org, linux@arm.linux.org.uk Cc: rob.herring@calxeda.com, linux-arm-kernel@lists.infradead.org, patches@linaro.org, vinod.koul@intel.com Subject: [PATCH v2] DMA: fix AMBA PL08x compilation issue with 64bit DMA address type Date: Mon, 19 Aug 2013 12:19:28 +0200 Message-Id: <1376907568-18689-1-git-send-email-andre.przywara@linaro.org> X-Mailer: git-send-email 1.7.12.1 In-Reply-To: <20130815211515.GF23006@n2100.arm.linux.org.uk> References: <20130815211515.GF23006@n2100.arm.linux.org.uk> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: andre.przywara@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.177 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , When dma_addr_t is 64 bits long, compilation of the AMBA PL08x DMA driver breaks due to a missing 64bit%8bit modulo operation. Looking more closely the divisor in these operations can only be 1, 2 or 4, so the full featured '%' modulo operation is overkill and can be replaced with simple bit masking. Change from v1: Replace open-coded function with existing IS_ALIGNED macro and use a macro around that to avoid a line becoming too long. Signed-off-by: Andre Przywara Acked-by: Vinod Koul --- drivers/dma/amba-pl08x.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index bce5fbf..bff41d4 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c @@ -133,6 +133,8 @@ struct pl08x_bus_data { u8 buswidth; }; +#define IS_BUS_ALIGNED(bus) IS_ALIGNED((bus)->addr, (bus)->buswidth) + /** * struct pl08x_phy_chan - holder for the physical channels * @id: physical index to this channel @@ -889,8 +891,8 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, return 0; } - if ((bd.srcbus.addr % bd.srcbus.buswidth) || - (bd.dstbus.addr % bd.dstbus.buswidth)) { + if (!IS_BUS_ALIGNED(&bd.srcbus) || + !IS_BUS_ALIGNED(&bd.dstbus)) { dev_err(&pl08x->adev->dev, "%s src & dst address must be aligned to src" " & dst width if peripheral is flow controller", @@ -911,9 +913,9 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, */ if (bd.remainder < mbus->buswidth) early_bytes = bd.remainder; - else if ((mbus->addr) % (mbus->buswidth)) { - early_bytes = mbus->buswidth - (mbus->addr) % - (mbus->buswidth); + else if (!IS_BUS_ALIGNED(mbus)) { + early_bytes = mbus->buswidth - + (mbus->addr & (mbus->buswidth - 1)); if ((bd.remainder - early_bytes) < mbus->buswidth) early_bytes = bd.remainder; } @@ -931,7 +933,7 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, * Master now aligned * - if slave is not then we must set its width down */ - if (sbus->addr % sbus->buswidth) { + if (!IS_BUS_ALIGNED(sbus)) { dev_dbg(&pl08x->adev->dev, "%s set down bus width to one byte\n", __func__);