From patchwork Sun Nov 17 04:30:19 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 21555 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ob0-f197.google.com (mail-ob0-f197.google.com [209.85.214.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 62F3E23FBB for ; Sun, 17 Nov 2013 04:29:30 +0000 (UTC) Received: by mail-ob0-f197.google.com with SMTP id wp4sf12572042obc.8 for ; Sat, 16 Nov 2013 20:29:30 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=AaqXOK6D9sqC3Li6CI1Yg5reJxtciZGFPTVFEyN9acI=; b=ZF66hJ6OMi3hWoq5UDemHXPk2wAJ6xcZ0hog9GzeIvucka7zgXBUeOd34bkqtuMus2 TvHRtnPH5NrkXdmXewhj4QGmlQEtSdVEemLWQfN/NZ7woxjpkpjrZthmBbeNXttpm9JB tiSCijJI6p7yEy45BtS0oECMNL71HPCv6FBaoCPupZ0ROp0vQMYbVn+GS9aQeUzl3tJ0 wfaZFgZd62WU9BxaCk8jMb9DlCpZRIl6XBPq2IwgX0rD5dcqbl5ON1eGpTrlwRsmk0Wp dJe25sHU+GC82NvwwvcD7ZuW1Bjawth/cSPcr2yDp/ZjFwfQ1S6b32zFMM/cQu5+3YpJ qu3Q== X-Gm-Message-State: ALoCoQky2c3DjxlO7Whd3e0K1OJp6jnC87hb1fjExQ+lhFPg7Jmv8csfOy4B0g4D2JmWzdirtk3I X-Received: by 10.182.44.138 with SMTP id e10mr19467obm.44.1384662570019; Sat, 16 Nov 2013 20:29:30 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.99.67 with SMTP id eo3ls2217753qeb.41.gmail; Sat, 16 Nov 2013 20:29:29 -0800 (PST) X-Received: by 10.52.244.15 with SMTP id xc15mr689172vdc.52.1384662569905; Sat, 16 Nov 2013 20:29:29 -0800 (PST) Received: from mail-vb0-f50.google.com (mail-vb0-f50.google.com [209.85.212.50]) by mx.google.com with ESMTPS id v1si5035067vdh.152.2013.11.16.20.29.29 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 16 Nov 2013 20:29:29 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.50 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.212.50; Received: by mail-vb0-f50.google.com with SMTP id x11so3867388vbb.9 for ; Sat, 16 Nov 2013 20:29:29 -0800 (PST) X-Received: by 10.58.46.18 with SMTP id r18mr9365453vem.4.1384662569817; Sat, 16 Nov 2013 20:29:29 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp126859vcz; Sat, 16 Nov 2013 20:29:29 -0800 (PST) X-Received: by 10.68.6.138 with SMTP id b10mr756434pba.149.1384662568813; Sat, 16 Nov 2013 20:29:28 -0800 (PST) Received: from mail-pa0-f51.google.com (mail-pa0-f51.google.com [209.85.220.51]) by mx.google.com with ESMTPS id sd2si6214994pbb.319.2013.11.16.20.29.28 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 16 Nov 2013 20:29:28 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.51 is neither permitted nor denied by best guess record for domain of christoffer.dall@linaro.org) client-ip=209.85.220.51; Received: by mail-pa0-f51.google.com with SMTP id fb1so5361850pad.10 for ; Sat, 16 Nov 2013 20:29:28 -0800 (PST) X-Received: by 10.68.66.33 with SMTP id c1mr6878042pbt.73.1384662568402; Sat, 16 Nov 2013 20:29:28 -0800 (PST) Received: from localhost.localdomain (c-67-169-181-221.hsd1.ca.comcast.net. [67.169.181.221]) by mx.google.com with ESMTPSA id ho3sm14498530pbb.23.2013.11.16.20.29.26 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 16 Nov 2013 20:29:27 -0800 (PST) From: Christoffer Dall To: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: patches@linaro.org, Christoffer Dall Subject: [PATCH v3 8/9] KVM: arm-vgic: Add GICD_SPENDSGIR and GICD_CPENDSGIR handlers Date: Sat, 16 Nov 2013 20:30:19 -0800 Message-Id: <1384662620-13795-9-git-send-email-christoffer.dall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1384662620-13795-1-git-send-email-christoffer.dall@linaro.org> References: <1384662620-13795-1-git-send-email-christoffer.dall@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: christoffer.dall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.50 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Handle MMIO accesses to the two registers which should support both the case where the VMs want to read/write either of these registers and the case where user space reads/writes these registers to do save/restore of the VGIC state. Note that the added complexity compared to simple set/clear enable registers stems from the bookkeping of source cpu ids. It may be possible to change the underlying data structure to simplify the complexity, but since this is not in the critical path at all, this will do. Also note that reading this register from a live guest will not be accurate compared to on hardware, because some state may be living on the CPU LRs and the only way to give a consistent read would be to force stop all the VCPUs and request them to unqueu the LR state onto the distributor. Until we have an actual user of live reading this register, we can live with the difference. Signed-off-by: Christoffer Dall Changelog[v3]: - Renamed read/write SGI set/clear functions - Rely on unqueuing of interrupts from LRs instead of reading LRs directly - Deduplicate code Changelog[v2]: - Use struct kvm_exit_mmio accessors for ->data field. Acked-by: Marc Zyngier --- virt/kvm/arm/vgic.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 66 insertions(+), 4 deletions(-) diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c index 44c669b..16053eb 100644 --- a/virt/kvm/arm/vgic.c +++ b/virt/kvm/arm/vgic.c @@ -655,18 +655,80 @@ static void vgic_unqueue_irqs(struct kvm_vcpu *vcpu) } } -static bool handle_mmio_sgi_clear(struct kvm_vcpu *vcpu, - struct kvm_exit_mmio *mmio, - phys_addr_t offset) +/* Handle reads of GICD_CPENDSGIRn and GICD_SPENDSGIRn */ +static bool read_set_clear_sgi_pend_reg(struct kvm_vcpu *vcpu, + struct kvm_exit_mmio *mmio, + phys_addr_t offset) { + struct vgic_dist *dist = &vcpu->kvm->arch.vgic; + int sgi; + int min_sgi = (offset & ~0x3) * 4; + int max_sgi = min_sgi + 3; + int vcpu_id = vcpu->vcpu_id; + u32 reg = 0; + + /* Copy source SGIs from distributor side */ + for (sgi = min_sgi; sgi <= max_sgi; sgi++) { + int shift = 8 * (sgi - min_sgi); + reg |= (u32)dist->irq_sgi_sources[vcpu_id][sgi] << shift; + } + + mmio_data_write(mmio, ~0, reg); return false; } +static bool write_set_clear_sgi_pend_reg(struct kvm_vcpu *vcpu, + struct kvm_exit_mmio *mmio, + phys_addr_t offset, bool set) +{ + struct vgic_dist *dist = &vcpu->kvm->arch.vgic; + int sgi; + int min_sgi = (offset & ~0x3) * 4; + int max_sgi = min_sgi + 3; + int vcpu_id = vcpu->vcpu_id; + u32 reg; + bool updated = false; + + reg = mmio_data_read(mmio, ~0); + + /* Clear pending SGIs on the distributor */ + for (sgi = min_sgi; sgi <= max_sgi; sgi++) { + u8 mask = reg >> (8 * (sgi - min_sgi)); + if (set) { + if ((dist->irq_sgi_sources[vcpu_id][sgi] & mask) != mask) + updated = true; + dist->irq_sgi_sources[vcpu_id][sgi] |= mask; + } else { + if (dist->irq_sgi_sources[vcpu_id][sgi] & mask) + updated = true; + dist->irq_sgi_sources[vcpu_id][sgi] &= ~mask; + } + } + + if (updated) + vgic_update_state(vcpu->kvm); + + return updated; +} + static bool handle_mmio_sgi_set(struct kvm_vcpu *vcpu, struct kvm_exit_mmio *mmio, phys_addr_t offset) { - return false; + if (!mmio->is_write) + return read_set_clear_sgi_pend_reg(vcpu, mmio, offset); + else + return write_set_clear_sgi_pend_reg(vcpu, mmio, offset, true); +} + +static bool handle_mmio_sgi_clear(struct kvm_vcpu *vcpu, + struct kvm_exit_mmio *mmio, + phys_addr_t offset) +{ + if (!mmio->is_write) + return read_set_clear_sgi_pend_reg(vcpu, mmio, offset); + else + return write_set_clear_sgi_pend_reg(vcpu, mmio, offset, false); } /*