From patchwork Sun Nov 17 11:04:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 21567 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-yh0-f71.google.com (mail-yh0-f71.google.com [209.85.213.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id B925F20299 for ; Sun, 17 Nov 2013 11:04:54 +0000 (UTC) Received: by mail-yh0-f71.google.com with SMTP id f73sf10518580yha.6 for ; Sun, 17 Nov 2013 03:04:54 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=JVKuQvuqq5d3MadAxPxftbxmy0tqVM3KxE/7N7FOzu0=; b=SoE8ERlFheF7fOAn0XVgn4u/MTy1L2OCKW9K2OUGTgFqgUlCNxRRuITSOOciOXV1AG dzrNbIz0sREbgsFwrY/u5L0a5ASfctnPmRxqzHFimj+P7WbYfsX11limUJczK7mhUvV+ aXmPXKDj+T0JNGL2ERaeqc5ZCS9gsrL/CA+xrHbio0yAao6EItAKa0aylDpVORbw8X21 MCd3TxrcK9sGaukRd0IswUXHY5mrk9iTxcuplyGn6mHUbBbou3LVGp4Fmffjs4S8DR6Z GTYgptoO1K6k6r3uzsQ+SKekrkwIw5JzBW1i4P1wxqKry3pAzL4QbCPRFnSCkhhfvdE3 PU9A== X-Gm-Message-State: ALoCoQm+VZjNDD6/2lBcPN1SvEGKnudm/fAiVQje9swfKp6aSNzJNe/uWje8Vbd+mt+uGm9dZvor X-Received: by 10.236.220.39 with SMTP id n37mr8386721yhp.15.1384686294580; Sun, 17 Nov 2013 03:04:54 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.71.209 with SMTP id x17ls2265352qeu.83.gmail; Sun, 17 Nov 2013 03:04:54 -0800 (PST) X-Received: by 10.52.230.102 with SMTP id sx6mr8265129vdc.15.1384686294498; Sun, 17 Nov 2013 03:04:54 -0800 (PST) Received: from mail-ve0-f179.google.com (mail-ve0-f179.google.com [209.85.128.179]) by mx.google.com with ESMTPS id st7si5543722vdc.120.2013.11.17.03.04.54 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 17 Nov 2013 03:04:54 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.179 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.179; Received: by mail-ve0-f179.google.com with SMTP id oz11so4272714veb.10 for ; Sun, 17 Nov 2013 03:04:54 -0800 (PST) X-Received: by 10.58.46.18 with SMTP id r18mr10006821vem.4.1384686294408; Sun, 17 Nov 2013 03:04:54 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp140378vcz; Sun, 17 Nov 2013 03:04:53 -0800 (PST) X-Received: by 10.180.103.193 with SMTP id fy1mr621601wib.10.1384686293303; Sun, 17 Nov 2013 03:04:53 -0800 (PST) Received: from mail-we0-f178.google.com (mail-we0-f178.google.com [74.125.82.178]) by mx.google.com with ESMTPS id jb15si2261624wic.43.2013.11.17.03.04.52 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 17 Nov 2013 03:04:53 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of linus.walleij@linaro.org) client-ip=74.125.82.178; Received: by mail-we0-f178.google.com with SMTP id u57so4741788wes.9 for ; Sun, 17 Nov 2013 03:04:52 -0800 (PST) X-Received: by 10.194.11.38 with SMTP id n6mr13006179wjb.25.1384686292879; Sun, 17 Nov 2013 03:04:52 -0800 (PST) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id fu1sm13156973wib.8.2013.11.17.03.04.51 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 17 Nov 2013 03:04:52 -0800 (PST) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Lee Jones Cc: devicetree@vger.kernel.org, Linus Walleij Subject: [PATCH 11/21] ARM: ux500: drop STM pinmap settings Date: Sun, 17 Nov 2013 12:04:00 +0100 Message-Id: <1384686250-10542-12-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1384686250-10542-1-git-send-email-linus.walleij@linaro.org> References: <1384686250-10542-1-git-send-email-linus.walleij@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.179 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The pin mappings for the STM (System Trace Macrocell) are not really used by anything: we have no driver for is and the settings are not connected to any device. We can recreate the different mux outputs in the device tree the day we need them. Drop these for now. Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/board-mop500-pins.c | 200 -------------------------------- 1 file changed, 200 deletions(-) diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index 07ddb89a6dbe..c311d11d6c3d 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c @@ -27,7 +27,6 @@ static enum custom_pin_cfg_t pinsfor; #define BIAS(a,b) static unsigned long a[] = { b } BIAS(pd, PIN_PULL_DOWN); -BIAS(in_nopull, PIN_INPUT_NOPULL); BIAS(in_pu, PIN_INPUT_PULLUP); BIAS(in_pd, PIN_INPUT_PULLDOWN); BIAS(out_lo, PIN_OUTPUT_LOW); @@ -43,15 +42,6 @@ BIAS(gpio_in_pu_slpm_gpio_nopull, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED|PIN_SLPM BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL); BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED); BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED); -/* Sleep modes */ -BIAS(slpm_in_wkup_pdis, PIN_SLEEPMODE_ENABLED| - PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); -BIAS(slpm_out_lo_pdis, PIN_SLEEPMODE_ENABLED| - PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE|PIN_SLPM_PDIS_DISABLED); -BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED| - PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); -BIAS(slpm_in_pu_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_PULLUP| - PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED); /* We use these to define hog settings that are always done on boot */ #define DB8500_MUX_HOG(group,func) \ @@ -321,190 +311,6 @@ static struct pinctrl_map __initdata ab8505_pinmap[] = { AB8505_PIN_HOG("GPIO53_D15", in_pd), }; -/* Pin control settings */ -static struct pinctrl_map __initdata mop500_family_pinmap[] = { - /* STM APE pins states */ - DB8500_MUX_STATE("stmape_c_1", "stmape", - "stm", "ape_mipi34"), - DB8500_PIN_STATE("GPIO70_G5", in_nopull, - "stm", "ape_mipi34"), /* clk */ - DB8500_PIN_STATE("GPIO71_G4", in_nopull, - "stm", "ape_mipi34"), /* dat3 */ - DB8500_PIN_STATE("GPIO72_H4", in_nopull, - "stm", "ape_mipi34"), /* dat2 */ - DB8500_PIN_STATE("GPIO73_H3", in_nopull, - "stm", "ape_mipi34"), /* dat1 */ - DB8500_PIN_STATE("GPIO74_J3", in_nopull, - "stm", "ape_mipi34"), /* dat0 */ - - DB8500_PIN_STATE("GPIO70_G5", slpm_out_lo_pdis, - "stm", "ape_mipi34_sleep"), /* clk */ - DB8500_PIN_STATE("GPIO71_G4", slpm_out_lo_pdis, - "stm", "ape_mipi34_sleep"), /* dat3 */ - DB8500_PIN_STATE("GPIO72_H4", slpm_out_lo_pdis, - "stm", "ape_mipi34_sleep"), /* dat2 */ - DB8500_PIN_STATE("GPIO73_H3", slpm_out_lo_pdis, - "stm", "ape_mipi34_sleep"), /* dat1 */ - DB8500_PIN_STATE("GPIO74_J3", slpm_out_lo_pdis, - "stm", "ape_mipi34_sleep"), /* dat0 */ - - DB8500_MUX_STATE("stmape_oc1_1", "stmape", - "stm", "ape_microsd"), - DB8500_PIN_STATE("GPIO23_AA4", in_nopull, - "stm", "ape_microsd"), /* clk */ - DB8500_PIN_STATE("GPIO25_Y4", in_nopull, - "stm", "ape_microsd"), /* dat0 */ - DB8500_PIN_STATE("GPIO26_Y2", in_nopull, - "stm", "ape_microsd"), /* dat1 */ - DB8500_PIN_STATE("GPIO27_AA2", in_nopull, - "stm", "ape_microsd"), /* dat2 */ - DB8500_PIN_STATE("GPIO28_AA1", in_nopull, - "stm", "ape_microsd"), /* dat3 */ - - DB8500_PIN_STATE("GPIO23_AA4", slpm_out_lo_wkup_pdis, - "stm", "ape_microsd_sleep"), /* clk */ - DB8500_PIN_STATE("GPIO25_Y4", slpm_in_wkup_pdis, - "stm", "ape_microsd_sleep"), /* dat0 */ - DB8500_PIN_STATE("GPIO26_Y2", slpm_in_wkup_pdis, - "stm", "ape_microsd_sleep"), /* dat1 */ - DB8500_PIN_STATE("GPIO27_AA2", slpm_in_wkup_pdis, - "stm", "ape_microsd_sleep"), /* dat2 */ - DB8500_PIN_STATE("GPIO28_AA1", slpm_in_wkup_pdis, - "stm", "ape_microsd_sleep"), /* dat3 */ - - /* STM Modem pins states */ - DB8500_MUX_STATE("stmmod_oc3_2", "stmmod", - "stm", "mod_mipi34"), - DB8500_MUX_STATE("uartmodrx_oc3_1", "uartmod", - "stm", "mod_mipi34"), - DB8500_MUX_STATE("uartmodtx_oc3_1", "uartmod", - "stm", "mod_mipi34"), - DB8500_PIN_STATE("GPIO70_G5", in_nopull, - "stm", "mod_mipi34"), /* clk */ - DB8500_PIN_STATE("GPIO71_G4", in_nopull, - "stm", "mod_mipi34"), /* dat3 */ - DB8500_PIN_STATE("GPIO72_H4", in_nopull, - "stm", "mod_mipi34"), /* dat2 */ - DB8500_PIN_STATE("GPIO73_H3", in_nopull, - "stm", "mod_mipi34"), /* dat1 */ - DB8500_PIN_STATE("GPIO74_J3", in_nopull, - "stm", "mod_mipi34"), /* dat0 */ - DB8500_PIN_STATE("GPIO75_H2", in_pu, - "stm", "mod_mipi34"), /* uartmod rx */ - DB8500_PIN_STATE("GPIO76_J2", out_lo, - "stm", "mod_mipi34"), /* uartmod tx */ - - DB8500_PIN_STATE("GPIO70_G5", slpm_out_lo_pdis, - "stm", "mod_mipi34_sleep"), /* clk */ - DB8500_PIN_STATE("GPIO71_G4", slpm_out_lo_pdis, - "stm", "mod_mipi34_sleep"), /* dat3 */ - DB8500_PIN_STATE("GPIO72_H4", slpm_out_lo_pdis, - "stm", "mod_mipi34_sleep"), /* dat2 */ - DB8500_PIN_STATE("GPIO73_H3", slpm_out_lo_pdis, - "stm", "mod_mipi34_sleep"), /* dat1 */ - DB8500_PIN_STATE("GPIO74_J3", slpm_out_lo_pdis, - "stm", "mod_mipi34_sleep"), /* dat0 */ - DB8500_PIN_STATE("GPIO75_H2", slpm_in_wkup_pdis, - "stm", "mod_mipi34_sleep"), /* uartmod rx */ - DB8500_PIN_STATE("GPIO76_J2", slpm_out_lo_wkup_pdis, - "stm", "mod_mipi34_sleep"), /* uartmod tx */ - - DB8500_MUX_STATE("stmmod_b_1", "stmmod", - "stm", "mod_microsd"), - DB8500_MUX_STATE("uartmodrx_oc3_1", "uartmod", - "stm", "mod_microsd"), - DB8500_MUX_STATE("uartmodtx_oc3_1", "uartmod", - "stm", "mod_microsd"), - DB8500_PIN_STATE("GPIO23_AA4", in_nopull, - "stm", "mod_microsd"), /* clk */ - DB8500_PIN_STATE("GPIO25_Y4", in_nopull, - "stm", "mod_microsd"), /* dat0 */ - DB8500_PIN_STATE("GPIO26_Y2", in_nopull, - "stm", "mod_microsd"), /* dat1 */ - DB8500_PIN_STATE("GPIO27_AA2", in_nopull, - "stm", "mod_microsd"), /* dat2 */ - DB8500_PIN_STATE("GPIO28_AA1", in_nopull, - "stm", "mod_microsd"), /* dat3 */ - DB8500_PIN_STATE("GPIO75_H2", in_pu, - "stm", "mod_microsd"), /* uartmod rx */ - DB8500_PIN_STATE("GPIO76_J2", out_lo, - "stm", "mod_microsd"), /* uartmod tx */ - - DB8500_PIN_STATE("GPIO23_AA4", slpm_out_lo_wkup_pdis, - "stm", "mod_microsd_sleep"), /* clk */ - DB8500_PIN_STATE("GPIO25_Y4", slpm_in_wkup_pdis, - "stm", "mod_microsd_sleep"), /* dat0 */ - DB8500_PIN_STATE("GPIO26_Y2", slpm_in_wkup_pdis, - "stm", "mod_microsd_sleep"), /* dat1 */ - DB8500_PIN_STATE("GPIO27_AA2", slpm_in_wkup_pdis, - "stm", "mod_microsd_sleep"), /* dat2 */ - DB8500_PIN_STATE("GPIO28_AA1", slpm_in_wkup_pdis, - "stm", "mod_microsd_sleep"), /* dat3 */ - DB8500_PIN_STATE("GPIO75_H2", slpm_in_wkup_pdis, - "stm", "mod_microsd_sleep"), /* uartmod rx */ - DB8500_PIN_STATE("GPIO76_J2", slpm_out_lo_wkup_pdis, - "stm", "mod_microsd_sleep"), /* uartmod tx */ - - /* STM dual Modem/APE pins state */ - DB8500_MUX_STATE("stmmod_oc3_2", "stmmod", - "stm", "mod_mipi34_ape_mipi60"), - DB8500_MUX_STATE("stmape_c_2", "stmape", - "stm", "mod_mipi34_ape_mipi60"), - DB8500_MUX_STATE("uartmodrx_oc3_1", "uartmod", - "stm", "mod_mipi34_ape_mipi60"), - DB8500_MUX_STATE("uartmodtx_oc3_1", "uartmod", - "stm", "mod_mipi34_ape_mipi60"), - DB8500_PIN_STATE("GPIO70_G5", in_nopull, - "stm", "mod_mipi34_ape_mipi60"), /* clk */ - DB8500_PIN_STATE("GPIO71_G4", in_nopull, - "stm", "mod_mipi34_ape_mipi60"), /* dat3 */ - DB8500_PIN_STATE("GPIO72_H4", in_nopull, - "stm", "mod_mipi34_ape_mipi60"), /* dat2 */ - DB8500_PIN_STATE("GPIO73_H3", in_nopull, - "stm", "mod_mipi34_ape_mipi60"), /* dat1 */ - DB8500_PIN_STATE("GPIO74_J3", in_nopull, - "stm", "mod_mipi34_ape_mipi60"), /* dat0 */ - DB8500_PIN_STATE("GPIO75_H2", in_pu, - "stm", "mod_mipi34_ape_mipi60"), /* uartmod rx */ - DB8500_PIN_STATE("GPIO76_J2", out_lo, - "stm", "mod_mipi34_ape_mipi60"), /* uartmod tx */ - DB8500_PIN_STATE("GPIO155_C19", in_nopull, - "stm", "mod_mipi34_ape_mipi60"), /* clk */ - DB8500_PIN_STATE("GPIO156_C17", in_nopull, - "stm", "mod_mipi34_ape_mipi60"), /* dat3 */ - DB8500_PIN_STATE("GPIO157_A18", in_nopull, - "stm", "mod_mipi34_ape_mipi60"), /* dat2 */ - DB8500_PIN_STATE("GPIO158_C18", in_nopull, - "stm", "mod_mipi34_ape_mipi60"), /* dat1 */ - DB8500_PIN_STATE("GPIO159_B19", in_nopull, - "stm", "mod_mipi34_ape_mipi60"), /* dat0 */ - - DB8500_PIN_STATE("GPIO70_G5", slpm_out_lo_pdis, - "stm", "mod_mipi34_ape_mipi60_sleep"), /* clk */ - DB8500_PIN_STATE("GPIO71_G4", slpm_out_lo_pdis, - "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat3 */ - DB8500_PIN_STATE("GPIO72_H4", slpm_out_lo_pdis, - "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat2 */ - DB8500_PIN_STATE("GPIO73_H3", slpm_out_lo_pdis, - "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat1 */ - DB8500_PIN_STATE("GPIO74_J3", slpm_out_lo_pdis, - "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat0 */ - DB8500_PIN_STATE("GPIO75_H2", slpm_in_wkup_pdis, - "stm", "mod_mipi34_ape_mipi60_sleep"), /* uartmod rx */ - DB8500_PIN_STATE("GPIO76_J2", slpm_out_lo_wkup_pdis, - "stm", "mod_mipi34_ape_mipi60_sleep"), /* uartmod tx */ - DB8500_PIN_STATE("GPIO155_C19", slpm_in_wkup_pdis, - "stm", "mod_mipi34_ape_mipi60_sleep"), /* clk */ - DB8500_PIN_STATE("GPIO156_C17", slpm_in_wkup_pdis, - "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat3 */ - DB8500_PIN_STATE("GPIO157_A18", slpm_in_wkup_pdis, - "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat2 */ - DB8500_PIN_STATE("GPIO158_C18", slpm_in_wkup_pdis, - "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat1 */ - DB8500_PIN_STATE("GPIO159_B19", slpm_in_wkup_pdis, - "stm", "mod_mipi34_ape_mipi60_sleep"), /* dat0 */ -}; - /* * These are specifically for the MOP500 and HREFP (pre-v60) version of the * board, which utilized a TC35892 GPIO expander instead of using a lot of @@ -690,8 +496,6 @@ static void __init mop500_href_family_pinmaps_init(void) void __init mop500_pinmaps_init(void) { - pinctrl_register_mappings(mop500_family_pinmap, - ARRAY_SIZE(mop500_family_pinmap)); pinctrl_register_mappings(mop500_pinmap, ARRAY_SIZE(mop500_pinmap)); mop500_href_family_pinmaps_init(); @@ -705,8 +509,6 @@ void __init mop500_pinmaps_init(void) void __init snowball_pinmaps_init(void) { - pinctrl_register_mappings(mop500_family_pinmap, - ARRAY_SIZE(mop500_family_pinmap)); pinctrl_register_mappings(snowball_pinmap, ARRAY_SIZE(snowball_pinmap)); pinctrl_register_mappings(u8500_pinmap, @@ -717,8 +519,6 @@ void __init snowball_pinmaps_init(void) void __init hrefv60_pinmaps_init(void) { - pinctrl_register_mappings(mop500_family_pinmap, - ARRAY_SIZE(mop500_family_pinmap)); pinctrl_register_mappings(hrefv60_pinmap, ARRAY_SIZE(hrefv60_pinmap)); mop500_href_family_pinmaps_init();