From patchwork Tue Nov 19 06:49:50 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: vkamensky X-Patchwork-Id: 21606 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ob0-f197.google.com (mail-ob0-f197.google.com [209.85.214.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 1179F23FF8 for ; Tue, 19 Nov 2013 06:50:19 +0000 (UTC) Received: by mail-ob0-f197.google.com with SMTP id wp4sf18808525obc.8 for ; Mon, 18 Nov 2013 22:50:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=eT9xPLrKb4YYYJsIRNuVz1BFdKrge2cQhDYyRAdsIM0=; b=M4zLqNhCk0A0+a4gQ3KUVYhdprtECJq0pALYYe2sD796XCNyrOeFMOGvQxnw7qxwSH m+rFhzRzCw6kue0OZ/A4PBVEUz9F0HO8dT9BtcEZXdd7DwEkHnHhxwDbpE6WUT2CBduA UKPPxjJRBBpMxWWpbGMc+B3t6LyP7xO4aRFGRjXWULbzCVn664ECrqQcLWErLqlvyqQ5 wv9jf3uWBkI4f3S5qkParNIHnvwDx82BFO5zTeoIZV1F7zP9XIBsJ+L7Muo5UM/u/BDt fgMmYzNC2NKpIO6RyGOBhKmUUcZtWZC74g64nWZE6ZCa2mn5exxVIwRI9rhBo7NYXeVF xDqg== X-Gm-Message-State: ALoCoQnOc7FsilbWywNuRstf6C8dtB5YEgpT/7SzdmllPBiUGSEYMZofzmuMUlPeh/FqY8KT5UJs X-Received: by 10.50.66.232 with SMTP id i8mr9861420igt.3.1384843818543; Mon, 18 Nov 2013 22:50:18 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.104.40 with SMTP id gb8ls1707416qeb.27.gmail; Mon, 18 Nov 2013 22:50:18 -0800 (PST) X-Received: by 10.58.67.9 with SMTP id j9mr19485829vet.3.1384843818454; Mon, 18 Nov 2013 22:50:18 -0800 (PST) Received: from mail-vc0-f181.google.com (mail-vc0-f181.google.com [209.85.220.181]) by mx.google.com with ESMTPS id o3si7917236ves.48.2013.11.18.22.50.18 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 18 Nov 2013 22:50:18 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.181 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.181; Received: by mail-vc0-f181.google.com with SMTP id ks9so1959198vcb.12 for ; Mon, 18 Nov 2013 22:50:18 -0800 (PST) X-Received: by 10.52.160.130 with SMTP id xk2mr5750794vdb.24.1384843818366; Mon, 18 Nov 2013 22:50:18 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp256833vcz; Mon, 18 Nov 2013 22:50:17 -0800 (PST) X-Received: by 10.66.249.134 with SMTP id yu6mr25230554pac.37.1384843815550; Mon, 18 Nov 2013 22:50:15 -0800 (PST) Received: from mail-pb0-f46.google.com (mail-pb0-f46.google.com [209.85.160.46]) by mx.google.com with ESMTPS id bq8si11282687pab.29.2013.11.18.22.50.15 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 18 Nov 2013 22:50:15 -0800 (PST) Received-SPF: neutral (google.com: 209.85.160.46 is neither permitted nor denied by best guess record for domain of victor.kamensky@linaro.org) client-ip=209.85.160.46; Received: by mail-pb0-f46.google.com with SMTP id md12so1453173pbc.19 for ; Mon, 18 Nov 2013 22:50:15 -0800 (PST) X-Received: by 10.68.106.98 with SMTP id gt2mr17274015pbb.61.1384843815053; Mon, 18 Nov 2013 22:50:15 -0800 (PST) Received: from kamensky-w530.cisco.com.com (128-107-239-233.cisco.com. [128.107.239.233]) by mx.google.com with ESMTPSA id pu5sm31894731pac.21.2013.11.18.22.50.13 for (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128/128); Mon, 18 Nov 2013 22:50:14 -0800 (PST) From: Victor Kamensky To: linux-arm-kernel@lists.infradead.org, Dave.Martin@arm.com, ben.dooks@codethink.co.uk, u.kleine-koenig@pengutronix.de Cc: rmk@arm.linux.org.uk, nicolas.pitre@linaro.org, will.deacon@arm.com, taras.kondratiuk@linaro.org, patches@linaro.org, linaro-kernel@lists.linaro.org, Victor Kamensky Subject: [PATCH v3] ARM: signal: fix armv7-m build issue in sigreturn_codes.S Date: Mon, 18 Nov 2013 22:49:50 -0800 Message-Id: <1384843790-14394-2-git-send-email-victor.kamensky@linaro.org> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1384843790-14394-1-git-send-email-victor.kamensky@linaro.org> References: <1384843790-14394-1-git-send-email-victor.kamensky@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: victor.kamensky@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.181 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , After "ARM: signal: sigreturn_codes should be endian neutral to work in BE8" commit, thumb only platforms, like armv7m, fails to compile sigreturn_codes.S. The reason is that for such arch values '.arm' directive and arm opcodes are not allowed. Fix conditionally enables arm opcodes only if no CONFIG_CPU_THUMBONLY defined and it uses .org instructions to keep sigreturn_codes layout. Suggested-by: Dave Martin Signed-off-by: Victor Kamensky Tested-by: Uwe Kleine-König --- arch/arm/kernel/sigreturn_codes.S | 40 ++++++++++++++++++++++++++++++--------- 1 file changed, 31 insertions(+), 9 deletions(-) diff --git a/arch/arm/kernel/sigreturn_codes.S b/arch/arm/kernel/sigreturn_codes.S index 3c5d0f2..9d48fe9 100644 --- a/arch/arm/kernel/sigreturn_codes.S +++ b/arch/arm/kernel/sigreturn_codes.S @@ -30,6 +30,27 @@ * snippets. */ +/* + * In CPU_THUMBONLY case kernel arm opcodes are not allowed. + * Note in this case codes skips those instructions but it uses .org + * directive to keep correct layout of sigreturn_codes array. + */ +#ifndef CONFIG_CPU_THUMBONLY +#define ARM_INSTR(code...) code +#else +#define ARM_INSTR(code...) +#endif + +.macro arm_slot n + .org sigreturn_codes + 12 * (\n) +ARM_INSTR( .arm ) +.endm + +.macro thumb_slot n + .org sigreturn_codes + 12 * (\n) + 8 + .thumb +.endm + #if __LINUX_ARM_ARCH__ <= 4 /* * Note we manually set minimally required arch that supports @@ -45,26 +66,27 @@ .global sigreturn_codes .type sigreturn_codes, #object - .arm + .align sigreturn_codes: /* ARM sigreturn syscall code snippet */ - mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) - swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE) +arm_slot 0 +ARM_INSTR(mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)) +ARM_INSTR(swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) /* Thumb sigreturn syscall code snippet */ - .thumb +thumb_slot 0 movs r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) swi #0 /* ARM sigreturn_rt syscall code snippet */ - .arm - mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) - swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE) +arm_slot 1 +ARM_INSTR(mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)) +ARM_INSTR(swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) /* Thumb sigreturn_rt syscall code snippet */ - .thumb +thumb_slot 1 movs r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) swi #0 @@ -74,7 +96,7 @@ sigreturn_codes: * it is thumb case or not, so we need additional * word after real last entry. */ - .arm +arm_slot 2 .space 4 .size sigreturn_codes, . - sigreturn_codes