From patchwork Fri Dec 20 17:25:12 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 22688 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-qe0-f69.google.com (mail-qe0-f69.google.com [209.85.128.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 39166202AE for ; Fri, 20 Dec 2013 17:25:23 +0000 (UTC) Received: by mail-qe0-f69.google.com with SMTP id 1sf2969171qec.8 for ; Fri, 20 Dec 2013 09:25:22 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=tQtpxJMJ6ob0VUSbKDOiEVNY1uVd3HMCVxDl8VBx1Hs=; b=aVtKBGPhM67cIzWGdxHqRHHMuvC2WLvzT7gvrSH8Y7RXrIOz6NaKRMuQ6SCznUcVt7 JuLvdFKirEJ1ltQNCMLWQ6BxpnIZPetGsAcbWVyhpL1zHeBwGL+BYSiWzBLWSHqKWosK 3mXGw/0KypvCWsLwINZsv6LUVgOAGIF9Eyxhd8HbcFt2OhJh3rfL4b4VYg2TS3frfU7A g85zfylMXFukTQFnT29B3tOYoIQc0wLwN3p7uB8olKxPdRHyaMewnWYdXTf0WghV7zWh MbUq+7MV1bhxcDR9dd0hJ/UZeetCafP1KlVFkr/wZC8HJ1kZvk4ZGYCP+/MlPdIcSfOb BYkQ== X-Gm-Message-State: ALoCoQlA51fPRPjYhj7LVK+aPpQrjNWprUmpTtT/IyZUl3d7qChyd9dhBwvqfblUUpMyf8tsM820 X-Received: by 10.52.252.106 with SMTP id zr10mr3331365vdc.8.1387560322639; Fri, 20 Dec 2013 09:25:22 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.73.69 with SMTP id j5ls799893qev.48.gmail; Fri, 20 Dec 2013 09:25:22 -0800 (PST) X-Received: by 10.220.103.141 with SMTP id k13mr73985vco.25.1387560322499; Fri, 20 Dec 2013 09:25:22 -0800 (PST) Received: from mail-ve0-f181.google.com (mail-ve0-f181.google.com [209.85.128.181]) by mx.google.com with ESMTPS id a15si1657852vew.7.2013.12.20.09.25.22 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 20 Dec 2013 09:25:22 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.181 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.181; Received: by mail-ve0-f181.google.com with SMTP id oy12so1694613veb.12 for ; Fri, 20 Dec 2013 09:25:22 -0800 (PST) X-Received: by 10.53.13.44 with SMTP id ev12mr4730191vdd.17.1387560322410; Fri, 20 Dec 2013 09:25:22 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.59.13.131 with SMTP id ey3csp77632ved; Fri, 20 Dec 2013 09:25:21 -0800 (PST) X-Received: by 10.152.29.202 with SMTP id m10mr4096860lah.23.1387560320697; Fri, 20 Dec 2013 09:25:20 -0800 (PST) Received: from mail-la0-f47.google.com (mail-la0-f47.google.com [209.85.215.47]) by mx.google.com with ESMTPS id x7si3797070lag.111.2013.12.20.09.25.20 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 20 Dec 2013 09:25:20 -0800 (PST) Received-SPF: neutral (google.com: 209.85.215.47 is neither permitted nor denied by best guess record for domain of linus.walleij@linaro.org) client-ip=209.85.215.47; Received: by mail-la0-f47.google.com with SMTP id ep20so1211740lab.6 for ; Fri, 20 Dec 2013 09:25:20 -0800 (PST) X-Received: by 10.112.92.112 with SMTP id cl16mr3898512lbb.15.1387560320063; Fri, 20 Dec 2013 09:25:20 -0800 (PST) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id r10sm6603785lag.7.2013.12.20.09.25.17 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 20 Dec 2013 09:25:18 -0800 (PST) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Russell King Cc: Peter Maydell , Linus Walleij Subject: [PATCH 1/5] ARM: versatile: move GPIO2 and GPIO3 to core Date: Fri, 20 Dec 2013 18:25:12 +0100 Message-Id: <1387560312-21425-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.8.3.1 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.181 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Move GPIO2 and GPIO3 to be registered from the core as this is certainly available on Versatile AB as well, not just the PB. GPIO2 is used for reading board status and GPIO3 is unused, but it does not hurt to register it anyway. Signed-off-by: Linus Walleij --- arch/arm/mach-versatile/core.c | 16 ++++++++++++++++ arch/arm/mach-versatile/versatile_pb.c | 21 --------------------- 2 files changed, 16 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 3b0572f30d56..a335126ae18f 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -570,6 +570,16 @@ static struct pl061_platform_data gpio1_plat_data = { .irq_base = IRQ_GPIO1_START, }; +static struct pl061_platform_data gpio2_plat_data = { + .gpio_base = 16, + .irq_base = IRQ_GPIO2_START, +}; + +static struct pl061_platform_data gpio3_plat_data = { + .gpio_base = 24, + .irq_base = IRQ_GPIO3_START, +}; + static struct pl022_ssp_controller ssp0_plat_data = { .bus_id = 0, .enable_dma = 0, @@ -596,6 +606,8 @@ static struct pl022_ssp_controller ssp0_plat_data = { #define WATCHDOG_IRQ { IRQ_WDOGINT } #define GPIO0_IRQ { IRQ_GPIOINT0 } #define GPIO1_IRQ { IRQ_GPIOINT1 } +#define GPIO2_IRQ { IRQ_GPIOINT2 } +#define GPIO3_IRQ { IRQ_GPIOINT3 } #define RTC_IRQ { IRQ_RTCINT } /* @@ -622,6 +634,8 @@ APB_DEVICE(sctl, "dev:e0", SCTL, NULL); APB_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); APB_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); APB_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); +APB_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); +APB_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); APB_DEVICE(rtc, "dev:e8", RTC, NULL); APB_DEVICE(sci0, "dev:f0", SCI, NULL); APB_DEVICE(uart0, "dev:f1", UART0, NULL); @@ -641,6 +655,8 @@ static struct amba_device *amba_devs[] __initdata = { &wdog_device, &gpio0_device, &gpio1_device, + &gpio2_device, + &gpio3_device, &rtc_device, &sci0_device, &ssp0_device, diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index 611d140c8695..9a53d0bd9144 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c @@ -47,27 +47,11 @@ static struct mmci_platform_data mmc1_plat_data = { .gpio_cd = -1, }; -static struct pl061_platform_data gpio2_plat_data = { - .gpio_base = 16, - .irq_base = IRQ_GPIO2_START, -}; - -static struct pl061_platform_data gpio3_plat_data = { - .gpio_base = 24, - .irq_base = IRQ_GPIO3_START, -}; - #define UART3_IRQ { IRQ_SIC_UART3 } #define SCI1_IRQ { IRQ_SIC_SCI3 } #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } /* - * These devices are connected via the core APB bridge - */ -#define GPIO2_IRQ { IRQ_GPIOINT2 } -#define GPIO3_IRQ { IRQ_GPIOINT3 } - -/* * These devices are connected via the DMA APB bridge */ @@ -76,14 +60,9 @@ APB_DEVICE(uart3, "fpga:09", UART3, NULL); APB_DEVICE(sci1, "fpga:0a", SCI1, NULL); APB_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); -/* DevChip Primecells */ -APB_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); -APB_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); static struct amba_device *amba_devs[] __initdata = { &uart3_device, - &gpio2_device, - &gpio3_device, &sci1_device, &mmc1_device, };