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[209.132.180.67]) by mx.google.com with ESMTP id nd12si16968296pab.272.2014.02.24.04.57.31; Mon, 24 Feb 2014 04:57:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752253AbaBXM5Y (ORCPT + 9 others); Mon, 24 Feb 2014 07:57:24 -0500 Received: from mail-we0-f169.google.com ([74.125.82.169]:49604 "EHLO mail-we0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752456AbaBXM5X (ORCPT ); Mon, 24 Feb 2014 07:57:23 -0500 Received: by mail-we0-f169.google.com with SMTP id t61so4714924wes.0 for ; Mon, 24 Feb 2014 04:57:22 -0800 (PST) X-Received: by 10.195.13.103 with SMTP id ex7mr18550302wjd.3.1393246642095; Mon, 24 Feb 2014 04:57:22 -0800 (PST) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id f3sm24111424wiv.2.2014.02.24.04.57.20 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 24 Feb 2014 04:57:21 -0800 (PST) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Mark Rutland , devicetree@vger.kernel.org Cc: Mark Brown , spi-devel-general@lists.sourceforge.net, Pawel Moll , Russell King , Linus Walleij Subject: [PATCH 2/2] ARM: u300: switch SSP/SPI clock name to "SSPCLK" Date: Mon, 24 Feb 2014 13:57:18 +0100 Message-Id: <1393246638-16236-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.8.5.3 Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.175 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , As noted in recent discussions the name of the core clock for the PL022 derived SPI blocks is erroneously named in the U300 device tree. The kernel doesn't currently use the name, but may do so soon so let use rename all these clocks in accordance with the name given in the PL022 TRM (ARM DDI 0194G). Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-u300.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts index a9da4800daf0..6fe688e9e4da 100644 --- a/arch/arm/boot/dts/ste-u300.dts +++ b/arch/arm/boot/dts/ste-u300.dts @@ -457,7 +457,7 @@ interrupt-parent = <&vica>; interrupts = <23>; clocks = <&spi_clk>, <&spi_clk>; - clock-names = "apb_pclk", "spi_clk"; + clock-names = "SSPCLK", "apb_pclk"; dmas = <&dmac 27 &dmac 28>; dma-names = "tx", "rx"; num-cs = <3>;