From patchwork Thu Jun 5 09:53:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Thompson X-Patchwork-Id: 31409 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ve0-f199.google.com (mail-ve0-f199.google.com [209.85.128.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 6251E203AC for ; Thu, 5 Jun 2014 09:53:44 +0000 (UTC) Received: by mail-ve0-f199.google.com with SMTP id oz11sf4267748veb.10 for ; Thu, 05 Jun 2014 02:53:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=Hvu2QkOonrvJjS0XXO/RPO+Lk4CkMcyykLZ9XK3MdS0=; b=lxtFQaVX8iI8EUcYJjO2eo1Zklt3Bv53Lsu/bGJ4XN9+hPgkXPwG2ETdQZTmtd6IPE bftW8DvOTgI+FUTxbobd6Iq5/mmftHGY0U3Jp8cDYrBQlyLqgPDPpPSNhzKD0Pg2kIY3 3pTNMoYkPlr3QF++o4WF8M1LznUAmirySfTqSDjcbpn+crYqzlsHnS7CDacxCiyf0BXZ Jz1PoEAdqLhiM+j1Uet6UsbB+gYmJanz5caeQ/Eum4tqrHZfUVPm+SxzC4JpsWvPy/96 sqkLgLTr5fhpgPnviErjWFXwXTyVx74Qf9YojjrNvojUk/iYtNFCOZLStaR7n9hMpNH0 ykGg== X-Gm-Message-State: ALoCoQlEYoQ2mr0iqNhh8eSldZHGWmj8Y+zGWqY7IACzsJTo6CCZC1TGvamu8WXxdBH4D4gybsPp X-Received: by 10.58.46.101 with SMTP id u5mr18258009vem.16.1401962024093; Thu, 05 Jun 2014 02:53:44 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.95.232 with SMTP id i95ls88230qge.7.gmail; Thu, 05 Jun 2014 02:53:44 -0700 (PDT) X-Received: by 10.58.128.229 with SMTP id nr5mr458320veb.76.1401962024001; Thu, 05 Jun 2014 02:53:44 -0700 (PDT) Received: from mail-ve0-f169.google.com (mail-ve0-f169.google.com [209.85.128.169]) by mx.google.com with ESMTPS id jl6si3425674vdb.50.2014.06.05.02.53.43 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 05 Jun 2014 02:53:43 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.169 as permitted sender) client-ip=209.85.128.169; Received: by mail-ve0-f169.google.com with SMTP id jx11so887974veb.0 for ; Thu, 05 Jun 2014 02:53:43 -0700 (PDT) X-Received: by 10.220.53.72 with SMTP id l8mr49252326vcg.16.1401962023904; Thu, 05 Jun 2014 02:53:43 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.221.54.6 with SMTP id vs6csp3737vcb; Thu, 5 Jun 2014 02:53:43 -0700 (PDT) X-Received: by 10.180.97.131 with SMTP id ea3mr13827639wib.35.1401962022894; Thu, 05 Jun 2014 02:53:42 -0700 (PDT) Received: from mail-wi0-f178.google.com (mail-wi0-f178.google.com [209.85.212.178]) by mx.google.com with ESMTPS id y16si10247908wju.93.2014.06.05.02.53.42 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 05 Jun 2014 02:53:42 -0700 (PDT) Received-SPF: pass (google.com: domain of daniel.thompson@linaro.org designates 209.85.212.178 as permitted sender) client-ip=209.85.212.178; Received: by mail-wi0-f178.google.com with SMTP id cc10so3086998wib.5 for ; Thu, 05 Jun 2014 02:53:42 -0700 (PDT) X-Received: by 10.194.189.116 with SMTP id gh20mr79839362wjc.41.1401962022243; Thu, 05 Jun 2014 02:53:42 -0700 (PDT) Received: from sundance.lan (cpc4-aztw19-0-0-cust157.18-1.cable.virginm.net. [82.33.25.158]) by mx.google.com with ESMTPSA id s3sm7337863wje.36.2014.06.05.02.53.39 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 05 Jun 2014 02:53:41 -0700 (PDT) From: Daniel Thompson To: Jason Wessel Cc: Daniel Thompson , kgdb-bugreport@lists.sourceforge.net, patches@linaro.org, linux-arm-kernel@lists.infradead.org, linaro-kernel@lists.linaro.org, linux-kernel@vger.kernel.org, John Stultz , Anton Vorontsov , Colin Cross , Dirk Behme , kernel-team@android.com, Russell King , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Thomas Gleixner , Greg Kroah-Hartman , Jiri Slaby , "David A. Long" , Nicolas Pitre , Catalin Marinas , Frederic Weisbecker , Linus Walleij , Christoffer Dall , kernel@stlinux.com, devicetree@vger.kernel.org, linux-serial@vger.kernel.org Subject: [RFC v3 8/9] serial: amba-pl011: Pass on FIQ information to KGDB. Date: Thu, 5 Jun 2014 10:53:13 +0100 Message-Id: <1401961994-18033-9-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1401961994-18033-1-git-send-email-daniel.thompson@linaro.org> References: <1400853478-5824-1-git-send-email-daniel.thompson@linaro.org> <1401961994-18033-1-git-send-email-daniel.thompson@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: daniel.thompson@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.169 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , If the AMBA bus has provided the pl011 with a FIQ resource (i.e. a second IRQ) then speculatively register it with KGDB when the polling driver is initialized. By providing this information to KGDB the serial driver offers "permission" for KGDB to route the UART interrupt signal from the drivers own handler to KGDBs FIQ handler (which will eventually use the UART's polled I/O callbacks to interact with the user). This permission also implies the amba-pl011 driver has already unmasked RX interrupts (otherwise the FIQ handler will never trigger). Signed-off-by: Daniel Thompson Cc: Russell King Cc: Greg Kroah-Hartman Cc: Jiri Slaby Cc: linux-serial@vger.kernel.org --- drivers/tty/serial/amba-pl011.c | 99 ++++++++++++++++++++++++----------------- 1 file changed, 58 insertions(+), 41 deletions(-) diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index dacf0a0..778fd38 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c @@ -58,6 +58,7 @@ #include #include #include +#include #define UART_NR 14 @@ -1416,8 +1417,63 @@ static void pl011_break_ctl(struct uart_port *port, int break_state) spin_unlock_irqrestore(&uap->port.lock, flags); } +static int pl011_hwinit(struct uart_port *port) +{ + struct uart_amba_port *uap = (struct uart_amba_port *)port; + int retval; + + /* Optionaly enable pins to be muxed in and configured */ + pinctrl_pm_select_default_state(port->dev); + + /* + * Try to enable the clock producer. + */ + retval = clk_prepare_enable(uap->clk); + if (retval) + goto out; + + uap->port.uartclk = clk_get_rate(uap->clk); + + /* Clear pending error and receive interrupts */ + writew(UART011_OEIS | UART011_BEIS | UART011_PEIS | UART011_FEIS | + UART011_RTIS | UART011_RXIS, uap->port.membase + UART011_ICR); + + /* + * Save interrupts enable mask, and enable RX interrupts in case if + * the interrupt is used for NMI entry. + */ + uap->im = readw(uap->port.membase + UART011_IMSC); + writew(UART011_RTIM | UART011_RXIM, uap->port.membase + UART011_IMSC); + + if (dev_get_platdata(uap->port.dev)) { + struct amba_pl011_data *plat; + + plat = dev_get_platdata(uap->port.dev); + if (plat->init) + plat->init(); + } + return 0; + out: + return retval; +} + #ifdef CONFIG_CONSOLE_POLL +static int pl011_poll_init(struct uart_port *port) +{ + struct uart_amba_port *uap = (struct uart_amba_port *)port; + int retval; + + retval = pl011_hwinit(port); + +#ifdef CONFIG_KGDB_FIQ + if (retval == 0) + kgdb_register_fiq(uap->port.irq); +#endif + + return retval; +} + static void pl011_quiesce_irqs(struct uart_port *port) { struct uart_amba_port *uap = (struct uart_amba_port *)port; @@ -1471,46 +1527,6 @@ static void pl011_put_poll_char(struct uart_port *port, #endif /* CONFIG_CONSOLE_POLL */ -static int pl011_hwinit(struct uart_port *port) -{ - struct uart_amba_port *uap = (struct uart_amba_port *)port; - int retval; - - /* Optionaly enable pins to be muxed in and configured */ - pinctrl_pm_select_default_state(port->dev); - - /* - * Try to enable the clock producer. - */ - retval = clk_prepare_enable(uap->clk); - if (retval) - goto out; - - uap->port.uartclk = clk_get_rate(uap->clk); - - /* Clear pending error and receive interrupts */ - writew(UART011_OEIS | UART011_BEIS | UART011_PEIS | UART011_FEIS | - UART011_RTIS | UART011_RXIS, uap->port.membase + UART011_ICR); - - /* - * Save interrupts enable mask, and enable RX interrupts in case if - * the interrupt is used for NMI entry. - */ - uap->im = readw(uap->port.membase + UART011_IMSC); - writew(UART011_RTIM | UART011_RXIM, uap->port.membase + UART011_IMSC); - - if (dev_get_platdata(uap->port.dev)) { - struct amba_pl011_data *plat; - - plat = dev_get_platdata(uap->port.dev); - if (plat->init) - plat->init(); - } - return 0; - out: - return retval; -} - static void pl011_write_lcr_h(struct uart_amba_port *uap, unsigned int lcr_h) { writew(lcr_h, uap->port.membase + uap->lcrh_rx); @@ -1890,7 +1906,7 @@ static struct uart_ops amba_pl011_pops = { .config_port = pl011_config_port, .verify_port = pl011_verify_port, #ifdef CONFIG_CONSOLE_POLL - .poll_init = pl011_hwinit, + .poll_init = pl011_poll_init, .poll_get_char = pl011_get_poll_char, .poll_put_char = pl011_put_poll_char, #endif @@ -2169,6 +2185,7 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id) uart_unregister_driver(&amba_reg); pl011_dma_remove(uap); } + out: return ret; }