From patchwork Thu Jun 12 15:42:35 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Thompson X-Patchwork-Id: 31835 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f72.google.com (mail-oa0-f72.google.com [209.85.219.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id B474620AE6 for ; Thu, 12 Jun 2014 15:42:49 +0000 (UTC) Received: by mail-oa0-f72.google.com with SMTP id eb12sf7023747oac.7 for ; Thu, 12 Jun 2014 08:42:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=ynRixNvX5kAlYasKOMqfB3QI6RUqKtSP8DRMoL/yrfw=; b=kFQzAGwqfuw2f81Kni2shl/XtNXhjUAm4WWqTf/VJzvqgQzAUlfyJgNT8v1ATrS51K XnjukIbHYsjFbFb2PbrnFfvRqqEAs2PizRbefggCox3Ya/gWsHKFfkmZV5xCFa5pMgGl BcunBF/iecKA36jRRy6u660jQT2RWXW3zJ0G4r/hEcJJPSq4dqcgYwkYIAmN6VlgKOvC NjMF2Wf61a2xLb6BwW4N7T0A041lq0HoF32NlWQyo0z3YzevSOOpn0dNMfZCghrQ+mDm HTyXNnb7lrhRxJ0rgY0levxz3yKnK5lSua8skPiKZuUPgL4ycJ1YC2xSlTKQ8agRV73K haDw== X-Gm-Message-State: ALoCoQnCCIAnJ/Q1bALcG25QF79tlXZJxmw7tYwIkhBdV4DCvVbMoHkY9Sh0sOPEwUHR6xdmWTLy X-Received: by 10.182.58.71 with SMTP id o7mr1488972obq.3.1402587769369; Thu, 12 Jun 2014 08:42:49 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.106.98 with SMTP id d89ls3107607qgf.57.gmail; Thu, 12 Jun 2014 08:42:49 -0700 (PDT) X-Received: by 10.52.51.196 with SMTP id m4mr8250798vdo.26.1402587769150; Thu, 12 Jun 2014 08:42:49 -0700 (PDT) Received: from mail-vc0-f182.google.com (mail-vc0-f182.google.com [209.85.220.182]) by mx.google.com with ESMTPS id io2si429352vcb.84.2014.06.12.08.42.49 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 12 Jun 2014 08:42:49 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.182 as permitted sender) client-ip=209.85.220.182; Received: by mail-vc0-f182.google.com with SMTP id il7so1015664vcb.27 for ; Thu, 12 Jun 2014 08:42:49 -0700 (PDT) X-Received: by 10.58.112.65 with SMTP id io1mr797300veb.61.1402587769050; Thu, 12 Jun 2014 08:42:49 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.221.54.6 with SMTP id vs6csp413426vcb; Thu, 12 Jun 2014 08:42:48 -0700 (PDT) X-Received: by 10.194.186.210 with SMTP id fm18mr62529631wjc.67.1402587768136; Thu, 12 Jun 2014 08:42:48 -0700 (PDT) Received: from mail-wi0-f179.google.com (mail-wi0-f179.google.com [209.85.212.179]) by mx.google.com with ESMTPS id fb8si27586218wib.74.2014.06.12.08.42.44 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 12 Jun 2014 08:42:44 -0700 (PDT) Received-SPF: pass (google.com: domain of daniel.thompson@linaro.org designates 209.85.212.179 as permitted sender) client-ip=209.85.212.179; Received: by mail-wi0-f179.google.com with SMTP id cc10so3248374wib.0 for ; Thu, 12 Jun 2014 08:42:44 -0700 (PDT) X-Received: by 10.180.97.131 with SMTP id ea3mr7410226wib.35.1402587763889; Thu, 12 Jun 2014 08:42:43 -0700 (PDT) Received: from sundance.lan (cpc4-aztw19-0-0-cust157.18-1.cable.virginm.net. [82.33.25.158]) by mx.google.com with ESMTPSA id s14sm2186087wij.1.2014.06.12.08.42.42 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 12 Jun 2014 08:42:42 -0700 (PDT) From: Daniel Thompson To: Russell King Cc: Daniel Thompson , Rob Clark , Nicolas Pitre , Arnd Bergmann , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, patches@linaro.org, linaro-kernel@lists.linaro.org Subject: [PATCH v3] ARM: add get_user() support for 8 byte types Date: Thu, 12 Jun 2014 16:42:35 +0100 Message-Id: <1402587755-29245-1-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 1.9.3 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: daniel.thompson@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.182 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , A new atomic modeset/pageflip ioctl being developed in DRM requires get_user() to work for 64bit types (in addition to just put_user()). v1: original v2: pass correct size to check_uaccess, and better handling of narrowing double word read with __get_user_xb() (Russell King's suggestion) v3: fix a couple of checkpatch issues Signed-off-by: Rob Clark Signed-off-by: Daniel Thompson Cc: Russell King - ARM Linux --- Notes: I'd like to wake this patch up again. It was rejected back in 2012 on the grounds that other architectures (notably x86-32) didn't implement this so adding for ARM risked portability problems in drivers. However shortly after the discussion (in fact I believe that as a *result* of that discussion) support for 64-bit get_user() was added for x86-32. A quick review of different architectures uaccess.h shows that ARM is in the minority (even after excluding 64-bit architectures) in not implementing this feature. The reasons to wake it up are the same as before. Recent contributions, including to DRM[1] and binder[2] would prefer to use the 64-bit values in their interfaces without gotchas like having to use copy_from_user(). [1] http://thread.gmane.org/gmane.comp.video.dri.devel/102135/focus=102149 [2] http://thread.gmane.org/gmane.linux.kernel/1653448/focus=1653449 arch/arm/include/asm/uaccess.h | 18 +++++++++++++++++- arch/arm/lib/getuser.S | 17 ++++++++++++++++- 2 files changed, 33 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h index 75d9579..5f7db3fb 100644 --- a/arch/arm/include/asm/uaccess.h +++ b/arch/arm/include/asm/uaccess.h @@ -107,6 +107,7 @@ static inline void set_fs(mm_segment_t fs) extern int __get_user_1(void *); extern int __get_user_2(void *); extern int __get_user_4(void *); +extern int __get_user_8(void *); #define __GUP_CLOBBER_1 "lr", "cc" #ifdef CONFIG_CPU_USE_DOMAINS @@ -115,6 +116,7 @@ extern int __get_user_4(void *); #define __GUP_CLOBBER_2 "lr", "cc" #endif #define __GUP_CLOBBER_4 "lr", "cc" +#define __GUP_CLOBBER_8 "lr", "cc" #define __get_user_x(__r2,__p,__e,__l,__s) \ __asm__ __volatile__ ( \ @@ -125,11 +127,19 @@ extern int __get_user_4(void *); : "0" (__p), "r" (__l) \ : __GUP_CLOBBER_##__s) +/* narrowing a double-word get into a single 32bit word register: */ +#ifdef BIG_ENDIAN +#define __get_user_xb(__r2, __p, __e, __l, __s) \ + __get_user_x(__r2, (uintptr_t)__p + 4, __e, __l, __s) +#else +#define __get_user_xb __get_user_x +#endif + #define __get_user_check(x,p) \ ({ \ unsigned long __limit = current_thread_info()->addr_limit - 1; \ register const typeof(*(p)) __user *__p asm("r0") = (p);\ - register unsigned long __r2 asm("r2"); \ + register typeof(x) __r2 asm("r2"); \ register unsigned long __l asm("r1") = __limit; \ register int __e asm("r0"); \ switch (sizeof(*(__p))) { \ @@ -142,6 +152,12 @@ extern int __get_user_4(void *); case 4: \ __get_user_x(__r2, __p, __e, __l, 4); \ break; \ + case 8: \ + if (sizeof((x)) < 8) \ + __get_user_xb(__r2, __p, __e, __l, 4); \ + else \ + __get_user_x(__r2, __p, __e, __l, 8); \ + break; \ default: __e = __get_user_bad(); break; \ } \ x = (typeof(*(p))) __r2; \ diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S index 9b06bb4..ed98707 100644 --- a/arch/arm/lib/getuser.S +++ b/arch/arm/lib/getuser.S @@ -18,7 +18,7 @@ * Inputs: r0 contains the address * r1 contains the address limit, which must be preserved * Outputs: r0 is the error code - * r2 contains the zero-extended value + * r2, r3 contains the zero-extended value * lr corrupted * * No other registers must be altered. (see @@ -66,6 +66,19 @@ ENTRY(__get_user_4) mov pc, lr ENDPROC(__get_user_4) +ENTRY(__get_user_8) + check_uaccess r0, 8, r1, r2, __get_user_bad +#ifdef CONFIG_THUMB2_KERNEL +5: TUSER(ldr) r2, [r0] +6: TUSER(ldr) r3, [r0, #4] +#else +5: TUSER(ldr) r2, [r0], #4 +6: TUSER(ldr) r3, [r0] +#endif + mov r0, #0 + mov pc, lr +ENDPROC(__get_user_8) + __get_user_bad: mov r2, #0 mov r0, #-EFAULT @@ -77,4 +90,6 @@ ENDPROC(__get_user_bad) .long 2b, __get_user_bad .long 3b, __get_user_bad .long 4b, __get_user_bad + .long 5b, __get_user_bad + .long 6b, __get_user_bad .popsection