From patchwork Wed Aug 6 15:46:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 34979 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pa0-f71.google.com (mail-pa0-f71.google.com [209.85.220.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id CB7C420523 for ; Wed, 6 Aug 2014 15:47:50 +0000 (UTC) Received: by mail-pa0-f71.google.com with SMTP id et14sf17246213pad.10 for ; Wed, 06 Aug 2014 08:47:50 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id:cc :precedence:list-id:list-unsubscribe:list-archive:list-post :list-help:list-subscribe:mime-version:sender:errors-to :x-original-sender:x-original-authentication-results:mailing-list :content-type:content-transfer-encoding; bh=4h6okBUyII545sCgTuVoaaij+dbk12JmmN8ms2gQU2U=; b=JWJQECEn04BIAy9B3yrKsEFA5izKuH8HObBvOQ1rKWJNI1+OZC3QdR409ve4YiakDe wEgNd/jo4X7K08/hoOQ867uIS6/kWDAanJ5eg2UEgVAksnLr9yJ4bR4RXvM+6r3xXwKb igPi9TNdeSYDs1tRpYBGJ2mIA6eXNXS3NNTJSjHNF+e/uf6zl1KC7qVAtrouC2xBXr1l m8WjtG+hbcXt1NurEasZe340b/jtUrMuh1GJmrBpjVWql6k3Ua9Guu/BST97pXkzmlX7 GqO+DljcuKsyowAhwg+RQP1Y0onbvMpeH0c8Sqb1QEoSOA2yHL9reHXJXZ9ShdHZb66c DnYQ== X-Gm-Message-State: ALoCoQkCEBac0A+0vJ6Hh6wzGdmNzavy0/qbFnV5v5Kt158WFW/hCN81DM+p6TzpURLacftOw/gG X-Received: by 10.70.98.164 with SMTP id ej4mr6078218pdb.3.1407340070095; Wed, 06 Aug 2014 08:47:50 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.24.184 with SMTP id 53ls222342qgr.70.gmail; Wed, 06 Aug 2014 08:47:50 -0700 (PDT) X-Received: by 10.52.248.42 with SMTP id yj10mr9771841vdc.50.1407340069976; Wed, 06 Aug 2014 08:47:49 -0700 (PDT) Received: from mail-vc0-f177.google.com (mail-vc0-f177.google.com [209.85.220.177]) by mx.google.com with ESMTPS id df5si630009vec.75.2014.08.06.08.47.49 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 06 Aug 2014 08:47:49 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.177 as permitted sender) client-ip=209.85.220.177; Received: by mail-vc0-f177.google.com with SMTP id hy4so4300064vcb.36 for ; Wed, 06 Aug 2014 08:47:49 -0700 (PDT) X-Received: by 10.52.144.14 with SMTP id si14mr1281596vdb.95.1407340069833; Wed, 06 Aug 2014 08:47:49 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.37.5 with SMTP id tc5csp35491vcb; Wed, 6 Aug 2014 08:47:49 -0700 (PDT) X-Received: by 10.70.37.67 with SMTP id w3mr2672360pdj.107.1407340068621; Wed, 06 Aug 2014 08:47:48 -0700 (PDT) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id h12si1178834pat.203.2014.08.06.08.47.48 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Aug 2014 08:47:48 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XF3QD-00055l-5K; Wed, 06 Aug 2014 15:46:37 +0000 Received: from mail-wi0-f178.google.com ([209.85.212.178]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XF3QA-0004wr-Kk for linux-arm-kernel@lists.infradead.org; Wed, 06 Aug 2014 15:46:35 +0000 Received: by mail-wi0-f178.google.com with SMTP id hi2so3496008wib.17 for ; Wed, 06 Aug 2014 08:46:12 -0700 (PDT) X-Received: by 10.180.92.38 with SMTP id cj6mr17519551wib.64.1407339972019; Wed, 06 Aug 2014 08:46:12 -0700 (PDT) Received: from ards-macbook-pro.local ([188.252.209.16]) by mx.google.com with ESMTPSA id xn12sm19455514wib.13.2014.08.06.08.46.10 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 06 Aug 2014 08:46:11 -0700 (PDT) From: Ard Biesheuvel To: will.deacon@arm.com, mark.rutland@arm.com, catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/2] arm64: add helper functions to read I-cache attributes Date: Wed, 6 Aug 2014 17:46:05 +0200 Message-Id: <1407339966-29351-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140806_084634_823066_987B459D X-CRM114-Status: GOOD ( 11.19 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.212.178 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.212.178 listed in wl.mailspike.net] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: Ard Biesheuvel X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.177 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This adds helper functions and #defines to to read the line size and the number of sets from the level 1 instruction cache. Signed-off-by: Ard Biesheuvel --- v3: add WARN_ON(preemptible()), move icache_get_ccsidr() to cpuinfo.c to prevent #include header recursion hell v2: put () around macro args, use 64-bit types for asm() mrs/msr calls arch/arm64/include/asm/cachetype.h | 20 ++++++++++++++++++++ arch/arm64/kernel/cpuinfo.c | 14 ++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/arch/arm64/include/asm/cachetype.h b/arch/arm64/include/asm/cachetype.h index 7a2e0762cb40..4c631a0a3609 100644 --- a/arch/arm64/include/asm/cachetype.h +++ b/arch/arm64/include/asm/cachetype.h @@ -39,6 +39,26 @@ extern unsigned long __icache_flags; +#define CCSIDR_EL1_LINESIZE_MASK 0x7 +#define CCSIDR_EL1_LINESIZE(x) ((x) & CCSIDR_EL1_LINESIZE_MASK) + +#define CCSIDR_EL1_NUMSETS_SHIFT 13 +#define CCSIDR_EL1_NUMSETS_MASK (0x7fff << CCSIDR_EL1_NUMSETS_SHIFT) +#define CCSIDR_EL1_NUMSETS(x) \ + (((x) & CCSIDR_EL1_NUMSETS_MASK) >> CCSIDR_EL1_NUMSETS_SHIFT) + +extern u64 __attribute_const__ icache_get_ccsidr(void); + +static inline int icache_get_linesize(void) +{ + return 16 << CCSIDR_EL1_LINESIZE(icache_get_ccsidr()); +} + +static inline int icache_get_numsets(void) +{ + return 1 + CCSIDR_EL1_NUMSETS(icache_get_ccsidr()); +} + /* * Whilst the D-side always behaves as PIPT on AArch64, aliasing is * permitted in the I-cache. diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index f798f66634af..319255ff536d 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -20,8 +20,10 @@ #include #include +#include #include #include +#include #include #include @@ -190,3 +192,15 @@ void __init cpuinfo_store_boot_cpu(void) boot_cpu_data = *info; } + +u64 __attribute_const__ icache_get_ccsidr(void) +{ + u64 ccsidr; + + WARN_ON(preemptible()); + + /* Select L1 I-cache and read its size ID register */ + asm("msr csselr_el1, %1; isb; mrs %0, ccsidr_el1" + : "=r"(ccsidr) : "r"(1L)); + return ccsidr; +}