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[70.35.38.154]) by mx.google.com with ESMTPSA id v1sm17771310pdn.93.2014.09.17.14.56.38 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 17 Sep 2014 14:56:39 -0700 (PDT) From: Ard Biesheuvel To: christoffer.dall@linaro.org, marc.zyngier@arm.com, linux@arm.linux.org.uk, catalin.marinas@arm.com Subject: [PATCH 6/6] arm/arm64: KVM: map MMIO regions at creation time Date: Wed, 17 Sep 2014 14:56:21 -0700 Message-Id: <1410990981-665-7-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1410990981-665-1-git-send-email-ard.biesheuvel@linaro.org> References: <1410990981-665-1-git-send-email-ard.biesheuvel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140917_145700_156081_33333849 X-CRM114-Status: GOOD ( 14.72 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.220.49 listed in wl.mailspike.net] -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.49 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, Ard Biesheuvel X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.171 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 There is really no point in faulting in memory regions page by page if they are not backed by demand paged system RAM but by a linear passthrough mapping of a host MMIO region. Signed-off-by: Ard Biesheuvel --- arch/arm/kvm/mmu.c | 50 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-) diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c index fe53c3a30383..b153ef0c6d9f 100644 --- a/arch/arm/kvm/mmu.c +++ b/arch/arm/kvm/mmu.c @@ -1162,7 +1162,55 @@ void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, unsigned long npages) { - return 0; + hva_t hva = slot->userspace_addr; + phys_addr_t gpa = slot->base_gfn << PAGE_SHIFT; + phys_addr_t size = slot->npages << PAGE_SHIFT; + int ret = 0; + + /* + * A memslot could potentially cover multiple VMAs, so iterate + * over all of them to find out if we can map any of them right now. + * + * +--------------------------------------------+ + * +---+---------+-------------------+--------------+----+ + * | : VMA 1 | VMA 2 | VMA 3 : | + * +---+---------+-------------------+--------------+----+ + * | memslot | + * +--------------------------------------------+ + */ + do { + struct vm_area_struct *vma = find_vma(current->mm, hva); + hva_t start, end; + + if (!vma || vma->vm_start > hva) { + ret = -EFAULT; + break; + } + + start = max(slot->userspace_addr, vma->vm_start); + end = min((hva_t)(slot->userspace_addr + size), vma->vm_end); + + if (vma->vm_flags & VM_PFNMAP) { + phys_addr_t pa = (vma->vm_pgoff << PAGE_SHIFT) + start - + vma->vm_start; + bool writable = vma->vm_flags & VM_WRITE && + !(slot->flags & KVM_MEM_READONLY); + + ret = kvm_phys_addr_ioremap(kvm, gpa, pa, end - start, + writable); + if (ret) + break; + } + hva += end - start; + gpa += end - start; + } while (hva < slot->userspace_addr + size); + + if (ret) { + spin_lock(&kvm->mmu_lock); + unmap_stage2_range(kvm, slot->base_gfn << PAGE_SHIFT, size); + spin_unlock(&kvm->mmu_lock); + } + return ret; } void kvm_arch_memslots_updated(struct kvm *kvm)