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[209.85.215.50]) by mx.google.com with ESMTPS id w2si64961585laz.109.2015.01.06.00.42.09 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 06 Jan 2015 00:42:10 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.50 as permitted sender) client-ip=209.85.215.50; Received: by mail-la0-f50.google.com with SMTP id pn19so19647488lab.37 for ; Tue, 06 Jan 2015 00:42:09 -0800 (PST) X-Received: by 10.112.89.232 with SMTP id br8mr58891609lbb.69.1420533729877; Tue, 06 Jan 2015 00:42:09 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.9.200 with SMTP id c8csp1109195lbb; Tue, 6 Jan 2015 00:42:09 -0800 (PST) X-Received: by 10.70.45.17 with SMTP id i17mr155086835pdm.13.1420533728048; Tue, 06 Jan 2015 00:42:08 -0800 (PST) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v8si55814636pdm.232.2015.01.06.00.42.07; Tue, 06 Jan 2015 00:42:08 -0800 (PST) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754415AbbAFImG (ORCPT + 4 others); Tue, 6 Jan 2015 03:42:06 -0500 Received: from mail-pa0-f42.google.com ([209.85.220.42]:37769 "EHLO mail-pa0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754379AbbAFImF (ORCPT ); Tue, 6 Jan 2015 03:42:05 -0500 Received: by mail-pa0-f42.google.com with SMTP id et14so30654746pad.1 for ; Tue, 06 Jan 2015 00:42:04 -0800 (PST) X-Received: by 10.66.123.7 with SMTP id lw7mr68391981pab.103.1420533723942; Tue, 06 Jan 2015 00:42:03 -0800 (PST) Received: from localhost.localdomain ([101.3.44.45]) by mx.google.com with ESMTPSA id wm1sm56659605pac.11.2015.01.06.00.41.58 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 06 Jan 2015 00:42:03 -0800 (PST) From: Howard Chen To: matthias.bgg@gmail.com Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , linux-arm-kernel@lists.infradead.org (moderated list:ARM/Mediatek SoC...), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND...), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 1/2] Add sysirq device node for mt6592, also correct the timer interrupt. Date: Tue, 6 Jan 2015 16:42:30 +0800 Message-Id: <1420533751-23999-1-git-send-email-howard.chen@linaro.org> X-Mailer: git-send-email 1.9.1 Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: howard.chen@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.50 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Signed-off-by: Howard Chen --- arch/arm/boot/dts/mt6592.dtsi | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/mt6592.dtsi b/arch/arm/boot/dts/mt6592.dtsi index 31e5a09..1db453f 100644 --- a/arch/arm/boot/dts/mt6592.dtsi +++ b/arch/arm/boot/dts/mt6592.dtsi @@ -18,7 +18,7 @@ / { compatible = "mediatek,mt6592"; - interrupt-parent = <&gic>; + interrupt-parent = <&sysirq>; cpus { #address-cells = <1>; @@ -78,21 +78,34 @@ #clock-cells = <0>; }; + uart_clk: uart_clk { + compatible = "fixed-clock"; + clock-frequency = <26000000>; + #clock-cells = <0>; + }; + timer: timer@10008000 { compatible = "mediatek,mt6577-timer"; reg = <0x10008000 0x80>; - interrupts = ; + interrupts = ; clocks = <&system_clk>, <&rtc_clk>; clock-names = "system-clk", "rtc-clk"; }; + sysirq: interrupt-controller@10200220 { + compatible = "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0x10200220 0x1c>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a7-gic"; interrupt-controller; #interrupt-cells = <3>; + interrupt-parent = <&gic>; reg = <0x10211000 0x1000>, <0x10212000 0x1000>; }; - }; -