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[2001:1868:205::9]) by mx.google.com with ESMTPS id f2si33118421pat.213.2015.08.10.06.31.11 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Aug 2015 06:31:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZOn9F-0000Gy-IE; Mon, 10 Aug 2015 13:29:53 +0000 Received: from merlin.infradead.org ([2001:4978:20e::2]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZOn7c-0007HE-SZ for linux-arm-kernel@bombadil.infradead.org; Mon, 10 Aug 2015 13:28:13 +0000 Received: from mail-pa0-f41.google.com ([209.85.220.41]) by merlin.infradead.org with esmtps (Exim 4.85 #2 (Red Hat Linux)) id 1ZOn7b-0005X4-6H for linux-arm-kernel@lists.infradead.org; Mon, 10 Aug 2015 13:28:11 +0000 Received: by pacrr5 with SMTP id rr5so104053458pac.3 for ; Mon, 10 Aug 2015 06:27:44 -0700 (PDT) X-Received: by 10.66.248.9 with SMTP id yi9mr43878688pac.149.1439213264182; Mon, 10 Aug 2015 06:27:44 -0700 (PDT) Received: from localhost ([199.168.112.128]) by smtp.gmail.com with ESMTPSA id zn9sm17002050pac.11.2015.08.10.06.27.41 (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 10 Aug 2015 06:27:43 -0700 (PDT) From: Zhichao Huang To: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com, alex.bennee@linaro.org, will.deacon@arm.com Subject: [PATCH v4 08/15] KVM: arm: add a trace event for cp14 traps Date: Mon, 10 Aug 2015 21:26:00 +0800 Message-Id: <1439213167-8988-9-git-send-email-zhichao.huang@linaro.org> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1439213167-8988-1-git-send-email-zhichao.huang@linaro.org> References: <1439213167-8988-1-git-send-email-zhichao.huang@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150810_092811_312092_AB9AB4C5 X-CRM114-Status: GOOD ( 10.77 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.1 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.41 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.220.41 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Cc: huangzhichao@huawei.com, Zhichao Huang MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: zhichao.huang@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.44 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 There are too many cp15 traps, so we don't reuse the cp15 trace event but add a new trace event to trace the access of debug registers. Signed-off-by: Zhichao Huang Acked-by: Christoffer Dall --- arch/arm/kvm/coproc.c | 14 ++++++++++++++ arch/arm/kvm/trace.h | 30 ++++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+) diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c index 2164f4e..d15b250 100644 --- a/arch/arm/kvm/coproc.c +++ b/arch/arm/kvm/coproc.c @@ -643,6 +643,13 @@ int kvm_handle_cp_64(struct kvm_vcpu *vcpu, params.Rt2 = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf; params.CRm = 0; + if (global == cp14_regs) + trace_kvm_emulate_cp14_imp(params.Op1, params.Rt1, params.CRn, + params.CRm, params.Op2, params.is_write); + else + trace_kvm_emulate_cp15_imp(params.Op1, params.Rt1, params.CRn, + params.CRm, params.Op2, params.is_write); + if (!emulate_cp(vcpu, ¶ms, target_specific, nr_specific)) return 1; if (!emulate_cp(vcpu, ¶ms, global, nr_global)) @@ -680,6 +687,13 @@ int kvm_handle_cp_32(struct kvm_vcpu *vcpu, params.Op2 = (kvm_vcpu_get_hsr(vcpu) >> 17) & 0x7; params.Rt2 = 0; + if (global == cp14_regs) + trace_kvm_emulate_cp14_imp(params.Op1, params.Rt1, params.CRn, + params.CRm, params.Op2, params.is_write); + else + trace_kvm_emulate_cp15_imp(params.Op1, params.Rt1, params.CRn, + params.CRm, params.Op2, params.is_write); + if (!emulate_cp(vcpu, ¶ms, target_specific, nr_specific)) return 1; if (!emulate_cp(vcpu, ¶ms, global, nr_global)) diff --git a/arch/arm/kvm/trace.h b/arch/arm/kvm/trace.h index 0ec3539..988da03 100644 --- a/arch/arm/kvm/trace.h +++ b/arch/arm/kvm/trace.h @@ -159,6 +159,36 @@ TRACE_EVENT(kvm_emulate_cp15_imp, __entry->CRm, __entry->Op2) ); +/* Architecturally implementation defined CP14 register access */ +TRACE_EVENT(kvm_emulate_cp14_imp, + TP_PROTO(unsigned long Op1, unsigned long Rt1, unsigned long CRn, + unsigned long CRm, unsigned long Op2, bool is_write), + TP_ARGS(Op1, Rt1, CRn, CRm, Op2, is_write), + + TP_STRUCT__entry( + __field( unsigned int, Op1 ) + __field( unsigned int, Rt1 ) + __field( unsigned int, CRn ) + __field( unsigned int, CRm ) + __field( unsigned int, Op2 ) + __field( bool, is_write ) + ), + + TP_fast_assign( + __entry->is_write = is_write; + __entry->Op1 = Op1; + __entry->Rt1 = Rt1; + __entry->CRn = CRn; + __entry->CRm = CRm; + __entry->Op2 = Op2; + ), + + TP_printk("Implementation defined CP14: %s\tp14, %u, r%u, c%u, c%u, %u", + (__entry->is_write) ? "mcr" : "mrc", + __entry->Op1, __entry->Rt1, __entry->CRn, + __entry->CRm, __entry->Op2) +); + TRACE_EVENT(kvm_wfx, TP_PROTO(unsigned long vcpu_pc, bool is_wfe), TP_ARGS(vcpu_pc, is_wfe),