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[209.132.180.67]) by mx.google.com with ESMTP id af1si58471842pad.198.2015.10.07.08.27.12; Wed, 07 Oct 2015 08:27:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754806AbbJGP1I (ORCPT + 30 others); Wed, 7 Oct 2015 11:27:08 -0400 Received: from mail-pa0-f49.google.com ([209.85.220.49]:34400 "EHLO mail-pa0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754778AbbJGP1C (ORCPT ); Wed, 7 Oct 2015 11:27:02 -0400 Received: by padhy16 with SMTP id hy16so24467607pad.1 for ; Wed, 07 Oct 2015 08:27:01 -0700 (PDT) X-Received: by 10.67.5.226 with SMTP id cp2mr1682919pad.135.1444231621605; Wed, 07 Oct 2015 08:27:01 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id ja4sm40170570pbb.19.2015.10.07.08.27.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 07 Oct 2015 08:27:00 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org Subject: [PATCH 1/6] Coresight: ETMv4: Prevent TRCRSCTLR0&1 from being accessed Date: Wed, 7 Oct 2015 09:26:38 -0600 Message-Id: <1444231603-26676-2-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1444231603-26676-1-git-send-email-mathieu.poirier@linaro.org> References: <1444231603-26676-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: mathieu.poirier@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.182 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Chunyan Zhang 1. TRCRSCTLRn - Resource Selection Control Registers n=0~1 are reserved, we shouldn't access them. 2. The max number of 'n' here is defined in TRCIDR4.NUMRSPAIR whoes value indicates the number of resource selection *pairs*, and 0 indicates one resource selection pair, 1 indicates two pairs, and so on ... So, the total number of resource selection control registers which we can access is (TRCIDR4.NUMRSPAIR * 2) Signed-off-by: Chunyan Zhang Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm4x.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 254a81a4e6f4..a6707642bb23 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -136,7 +136,9 @@ static void etm4_enable_hw(void *info) writel_relaxed(drvdata->cntr_val[i], drvdata->base + TRCCNTVRn(i)); } - for (i = 0; i < drvdata->nr_resource; i++) + + /* Resource selector pair 0 is always implemented and reserved */ + for (i = 2; i < drvdata->nr_resource * 2; i++) writel_relaxed(drvdata->res_ctrl[i], drvdata->base + TRCRSCTLRn(i)); @@ -489,8 +491,9 @@ static ssize_t reset_store(struct device *dev, drvdata->cntr_val[i] = 0x0; } - drvdata->res_idx = 0x0; - for (i = 0; i < drvdata->nr_resource; i++) + /* Resource selector pair 0 is always implemented and reserved */ + drvdata->res_idx = 0x2; + for (i = 2; i < drvdata->nr_resource * 2; i++) drvdata->res_ctrl[i] = 0x0; for (i = 0; i < drvdata->nr_ss_cmp; i++) { @@ -1732,7 +1735,7 @@ static ssize_t res_idx_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; /* Resource selector pair 0 is always implemented and reserved */ - if ((val == 0) || (val >= drvdata->nr_resource)) + if (val < 2 || val >= drvdata->nr_resource * 2) return -EINVAL; /* @@ -2416,8 +2419,13 @@ static void etm4_init_arch_data(void *info) drvdata->nr_addr_cmp = BMVAL(etmidr4, 0, 3); /* NUMPC, bits[15:12] number of PE comparator inputs for tracing */ drvdata->nr_pe_cmp = BMVAL(etmidr4, 12, 15); - /* NUMRSPAIR, bits[19:16] the number of resource pairs for tracing */ - drvdata->nr_resource = BMVAL(etmidr4, 16, 19); + /* + * NUMRSPAIR, bits[19:16] + * The number of resource pairs conveyed by the HW starts at 0, i.e a + * value of 0x0 indicate 1 resource pair, 0x1 indicate two and so on. + * As such add 1 to the value of NUMRSPAIR for a better representation. + */ + drvdata->nr_resource = BMVAL(etmidr4, 16, 19) + 1; /* * NUMSSCC, bits[23:20] the number of single-shot * comparator control for tracing @@ -2504,6 +2512,8 @@ static void etm4_init_default_data(struct etmv4_drvdata *drvdata) drvdata->cntr_val[i] = 0x0; } + /* Resource selector pair 0 is always implemented and reserved */ + drvdata->res_idx = 0x2; for (i = 2; i < drvdata->nr_resource * 2; i++) drvdata->res_ctrl[i] = 0x0;