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[2001:1868:205::9]) by mx.google.com with ESMTPS id hl1si25453943pac.157.2015.11.12.23.01.27 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 12 Nov 2015 23:01:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dkim=neutral (body hash did not verify) header.i=@linaro_org.20150623.gappssmtp.com Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zx8Kj-00057c-ML; Fri, 13 Nov 2015 06:59:41 +0000 Received: from mail-wm0-x230.google.com ([2a00:1450:400c:c09::230]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zx8Kf-000533-7o for linux-arm-kernel@lists.infradead.org; Fri, 13 Nov 2015 06:59:38 +0000 Received: by wmec201 with SMTP id c201so66937944wme.0 for ; Thu, 12 Nov 2015 22:59:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro_org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=kbOGHtBjlYV5bRPntzoNxoBucVMwQrE9l0Yz7IE4GnU=; b=ODxajJViiFpnnNo52XyTd4ivE77eyf6IzNvjP3LYCeNO4D5Rg6O0Y+76oFhGMHhCtV g3QIlKye/4af/SCKB4yLMgFwyD4KocpWhjjEGR3EinZYIOZWkeR5lQomhNnTgGBuBavL 5iSQsWiUUYbAjT1tXFsX+/woJdzypxw5s54QE5Ax68NicXnhPnSVOOamdsfYo0CBIqwv MpAsH921hVycAD7h5nNEl74MC+6GjN5FM4IbCvDnQzKwsrmJOOuVJ+H1TlhchYbQKeI8 xmbKLDFUJ3Bi3r41/Dm8WPD3JYJ4L/BI0hkyblbUBo1jlASqeLdi/aSwEsJ44wjA5wAZ gwHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=kbOGHtBjlYV5bRPntzoNxoBucVMwQrE9l0Yz7IE4GnU=; b=bLFRnBs7ZVwDxfGr3nzSe0sn6r3N7yxI7jgb6/mrdoCu5eLTCTzWqhf+puqPxJm2Tu O2o4+kqbxcjtDNAacoHHhUcVtntUF8Uc7hm8tgaE+jjVvOjvZ9AY+D8bsU5Y45qzm6Xf C5+w76VBy1lBHmORtwRBkIiGwwXS337g/lyXQau8qArSL0GWz6qBokGVjdyM4zfQS+// VHoBxtMlu/UfngadS4XmJW597upvrqMOaa0qW4JWuvYjRrs/FPBBh5QuOmNd6tVKB1Wg hGZuJSv951SbvRMMaZYYcU1rvl3tTrnC/Vk9I8C5z/DySn+psalUPhD8T+fvF51T9wYR 2Dbg== X-Gm-Message-State: ALoCoQnyhjpZvmyqRv492S0IT7h8opsrA2WdM1I+it/vaFt8oIf2msX1/JaOyo1w6cIMVcIOr1ok X-Received: by 10.194.186.170 with SMTP id fl10mr20684854wjc.91.1447397954038; Thu, 12 Nov 2015 22:59:14 -0800 (PST) Received: from localhost.localdomain ([5.90.143.190]) by smtp.gmail.com with ESMTPSA id gl9sm18320646wjb.10.2015.11.12.22.59.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 12 Nov 2015 22:59:13 -0800 (PST) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@arm.linux.org.uk, nico@linaro.org, sboyd@codeaurora.org Subject: [PATCH] ARM: PJ4: move coprocessor register access sequences to iwmmxt.S Date: Fri, 13 Nov 2015 07:58:53 +0100 Message-Id: <1447397933-13379-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151112_225937_501226_7671FCD2 X-CRM114-Status: GOOD ( 14.23 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2a00:1450:400c:c09:0:0:0:230 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org The PJ4 inline asm sequences in pj4-cp0.c cannot be built in Thumb-2 mode, due to the way it performs arithmetic on the program counter, so it is built in ARM mode instead. However, building C files in ARM mode under CONFIG_THUMB2_KERNEL is problematic, since the instrumentation performed by subsystems like ftrace does not expect having to deal with interworking branches. So instead, revert to building pj4-cp0.c in Thumb-2 mode, and move the offending sequence to iwmmxt.S, which is not instrumented anyway, and is already built in ARM mode unconditionally. Reported-by: Stephen Boyd Signed-off-by: Ard Biesheuvel --- arch/arm/kernel/Makefile | 1 - arch/arm/kernel/iwmmxt.S | 21 +++++++++++++++++++++ arch/arm/kernel/pj4-cp0.c | 24 ++---------------------- 3 files changed, 23 insertions(+), 23 deletions(-) -- 1.9.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index af9e59bf3831..3c789496297f 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -73,7 +73,6 @@ obj-$(CONFIG_IWMMXT) += iwmmxt.o obj-$(CONFIG_PERF_EVENTS) += perf_regs.o perf_callchain.o obj-$(CONFIG_HW_PERF_EVENTS) += perf_event_xscale.o perf_event_v6.o \ perf_event_v7.o -CFLAGS_pj4-cp0.o := -marm AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o obj-$(CONFIG_VDSO) += vdso.o diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S index 49fadbda8c63..e1776bf52480 100644 --- a/arch/arm/kernel/iwmmxt.S +++ b/arch/arm/kernel/iwmmxt.S @@ -14,6 +14,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include @@ -370,3 +371,23 @@ ENDPROC(iwmmxt_task_release) concan_owner: .word 0 +#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B) + + __INIT + +ENTRY(pj4_cp_access_read) + mrc p15, 0, r0, c1, c0, 2 + ret lr +ENDPROC(pj4_cp_access_read) + +ENTRY(pj4_cp_access_write) + mcr p15, 0, r0, c1, c0, 2 + mrc p15, 0, r0, c1, c0, 2 + mov r0, r0 + sub pc, pc, #4 + ret lr +ENDPROC(pj4_cp_access_write) + + __FINIT + +#endif diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c index 8153e36b2491..4f226e175734 100644 --- a/arch/arm/kernel/pj4-cp0.c +++ b/arch/arm/kernel/pj4-cp0.c @@ -49,28 +49,8 @@ static struct notifier_block __maybe_unused iwmmxt_notifier_block = { .notifier_call = iwmmxt_do, }; - -static u32 __init pj4_cp_access_read(void) -{ - u32 value; - - __asm__ __volatile__ ( - "mrc p15, 0, %0, c1, c0, 2\n\t" - : "=r" (value)); - return value; -} - -static void __init pj4_cp_access_write(u32 value) -{ - u32 temp; - - __asm__ __volatile__ ( - "mcr p15, 0, %1, c1, c0, 2\n\t" - "mrc p15, 0, %0, c1, c0, 2\n\t" - "mov %0, %0\n\t" - "sub pc, pc, #4\n\t" - : "=r" (temp) : "r" (value)); -} +asmlinkage u32 pj4_cp_access_read(void); +asmlinkage void pj4_cp_access_write(u32 value); static int __init pj4_get_iwmmxt_version(void) {