From patchwork Fri Feb 26 17:35:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Auger Eric X-Patchwork-Id: 63102 Delivered-To: patches@linaro.org Received: by 10.112.235.234 with SMTP id up10csp1198lbc; Fri, 26 Feb 2016 09:37:00 -0800 (PST) X-Received: by 10.194.192.36 with SMTP id hd4mr2692189wjc.85.1456508201642; Fri, 26 Feb 2016 09:36:41 -0800 (PST) Return-Path: Received: from mail-wm0-x230.google.com (mail-wm0-x230.google.com. [2a00:1450:400c:c09::230]) by mx.google.com with ESMTPS id jt9si17096272wjc.124.2016.02.26.09.36.41 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 26 Feb 2016 09:36:41 -0800 (PST) Received-SPF: pass (google.com: domain of eric.auger@linaro.org designates 2a00:1450:400c:c09::230 as permitted sender) client-ip=2a00:1450:400c:c09::230; Authentication-Results: mx.google.com; spf=pass (google.com: domain of eric.auger@linaro.org designates 2a00:1450:400c:c09::230 as permitted sender) smtp.mailfrom=eric.auger@linaro.org; dkim=pass header.i=@linaro.org Received: by mail-wm0-x230.google.com with SMTP id b205so80982963wmb.1 for ; Fri, 26 Feb 2016 09:36:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cujWFhUKexOiqR05DUZK+//zwamIkHJwZPLCxHcbnGY=; b=XG4g/OIKid6F17aJ0nNZdqpCs2nfL6Z4++FTYGuoy25TJOOW5dtuZmJg/VRh5HI2mo EoWk7t5xIK8sE3alvfFZI0TLLAv/qajp5I6omQDFVMYkHxFCYHpKFFDc6yaOCy/oBpUg cGp9lmg0gWBGWoZbLYeI0UeguDohNeVIsoQf4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cujWFhUKexOiqR05DUZK+//zwamIkHJwZPLCxHcbnGY=; b=igVcKvnjOH/xkgtc+1/HM+MFHEcES06kFAU15bU+IO4rycyUGy34gEgqpRtSC8bhWZ MNkOFDEDzahdIiRBycipDEK9nqvoafbsRXJXGcO1nembMb3fsVFoEFQC1kQ1Rda8w+nM F1V1BAelTx9m0ip/Y/Nr/U2TCeGHUjAjd0bJD5Dyiq3IyyoJ44tFRVYsLNQMFH/HGhSN FLJ/WGRxdeBY1YFP2Q4Q9HgpyrDMURLQR0zcX8MXFV+EIcBdmdijK7yVe1VdYNEOubY4 9aO+zDERhaxVh5R4zxhbJq1gw7s2ahC+QoL0JzTIkN+5Tvg4RdKxoWHrb0HrJbBiS293 tNYA== X-Gm-Message-State: AD7BkJIM0+z0TP6eoytH5CmI4xgbRbJMfmlHbC9rnGNGN2neZtHeWNLA1fr3bRNEof3y2CQv4Mk= X-Received: by 10.194.189.211 with SMTP id gk19mr2764734wjc.63.1456508201445; Fri, 26 Feb 2016 09:36:41 -0800 (PST) Return-Path: Received: from new-host-8.home (LMontsouris-657-1-37-90.w80-11.abo.wanadoo.fr. [80.11.198.90]) by smtp.gmail.com with ESMTPSA id 77sm3750373wmp.18.2016.02.26.09.36.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 26 Feb 2016 09:36:39 -0800 (PST) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, robin.murphy@arm.com, alex.williamson@redhat.com, will.deacon@arm.com, joro@8bytes.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, christoffer.dall@linaro.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: suravee.suthikulpanit@amd.com, patches@linaro.org, linux-kernel@vger.kernel.org, Manish.Jaggi@caviumnetworks.com, Bharat.Bhushan@freescale.com, pranav.sawargaonkar@gmail.com, p.fedin@samsung.com, iommu@lists.linux-foundation.org Subject: [RFC v4 13/14] iommu/arm-smmu: do not advertise IOMMU_CAP_INTR_REMAP Date: Fri, 26 Feb 2016 17:35:53 +0000 Message-Id: <1456508154-2253-14-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1456508154-2253-1-git-send-email-eric.auger@linaro.org> References: <1456508154-2253-1-git-send-email-eric.auger@linaro.org> Do not advertise IOMMU_CAP_INTR_REMAP for arm-smmu. Indeed the irq_remapping capability is abstracted on irqchip side for ARM as opposed to Intel IOMMU featuring IRQ remapping HW. So to check IRQ remapping capability, the msi domain needs to be checked instead. This commit needs to be applied after "vfio/type1: also check IRQ remapping capability at msi domain" else the legacy interrupt assignment gets broken with arm-smmu. Signed-off-by: Eric Auger --- drivers/iommu/arm-smmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.9.1 diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index c8b7e71..ce988fb 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1284,7 +1284,7 @@ static bool arm_smmu_capable(enum iommu_cap cap) */ return true; case IOMMU_CAP_INTR_REMAP: - return true; /* MSIs are just memory writes */ + return false; /* interrupt translation handled at MSI controller level */ case IOMMU_CAP_NOEXEC: return true; default: