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[2001:1868:205::9]) by mx.google.com with ESMTPS id k4si7402654paw.143.2016.10.12.04.26.06 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 12 Oct 2016 04:26:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1buHeT-00048q-B4; Wed, 12 Oct 2016 11:24:49 +0000 Received: from mail-lf0-x234.google.com ([2a00:1450:4010:c07::234]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1buHe3-00041P-BK for linux-arm-kernel@lists.infradead.org; Wed, 12 Oct 2016 11:24:25 +0000 Received: by mail-lf0-x234.google.com with SMTP id b81so69936514lfe.1 for ; Wed, 12 Oct 2016 04:24:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Jx+aGqbk1CJxODmBu2OsMawNJo0jCYWKGHleMjK1DGQ=; b=N+Zhh8oWLdOMJuDKpkfgeK6f1GUqxU/sb6H7ZbC+TZvz4Gehm/DKo0cpjcpobZ4/ea 6cwaVWiy73wny3Vmjypzxga0wVKjt4wfBvY73yPuIwv6Z3krrUyU8hjvDTFGvy/vLz00 ZXUzeHgva+CJ/QzA0E4iD3RynBNVmGIkMPCQ0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Jx+aGqbk1CJxODmBu2OsMawNJo0jCYWKGHleMjK1DGQ=; b=MmkJe5gFsnwCc7To69He1edvKhoEqSAjG21vqAJQO+tz0KpGnDtS6vdSJzpWpaw+q5 xaoysfuipblb4uO1tZuVovjbP8TvpiglvBYBKy+/nzRe5dlr4xX3CuQog9zkRnBgPHxG WdI/Vqg4j+eTk3/82mqt9/v3n0lf6TWa5oNQMrvR4tpUaB1xXgQgVkjjS4g4BHZQJdNP sGMM9rvneRT1Sj95g8jdbaID3I4NV7RSKZuxj2aeZ+N0EW3TbnFPOR+/pvGBkJOWkCe7 mcTantop38CMrNEjmH8jX1ktayAt5/rvObPCkLQLC/WD9FgIWJCNwYvEq+go6PrSaXti Vieg== X-Gm-Message-State: AA6/9RmxaSrKp+9Jnpu/O9av2CX3qnDrWdkW+ZktCiJCoEsfRVWqOOHuvDEk2rszT/cM3YJJ X-Received: by 10.194.100.169 with SMTP id ez9mr744599wjb.9.1476271441166; Wed, 12 Oct 2016 04:24:01 -0700 (PDT) Received: from localhost.localdomain ([196.67.25.208]) by smtp.gmail.com with ESMTPSA id jt8sm12034690wjc.33.2016.10.12.04.23.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 12 Oct 2016 04:24:00 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com Subject: [PATCH v3 3/5] arm64: mm: set the contiguous bit for kernel mappings where appropriate Date: Wed, 12 Oct 2016 12:23:43 +0100 Message-Id: <1476271425-19401-4-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1476271425-19401-1-git-send-email-ard.biesheuvel@linaro.org> References: <1476271425-19401-1-git-send-email-ard.biesheuvel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161012_042423_702389_1B419505 X-CRM114-Status: GOOD ( 15.74 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2a00:1450:4010:c07:0:0:0:234 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: steve.capper@linaro.org, jeremy.linton@arm.com, Ard Biesheuvel MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Now that we no longer allow live kernel PMDs to be split, it is safe to start using the contiguous bit for kernel mappings. So set the contiguous bit in the kernel page mappings for regions whose size and alignment are suitable for this. This enables the following contiguous range sizes for the virtual mapping of the kernel image, and for the linear mapping: granule size | cont PTE | cont PMD | -------------+------------+------------+ 4 KB | 64 KB | 32 MB | 16 KB | 2 MB | 1 GB* | 64 KB | 2 MB | 16 GB* | * only when built for 3 or more levels of translation Signed-off-by: Ard Biesheuvel --- arch/arm64/mm/mmu.c | 35 +++++++++++++++++--- 1 file changed, 31 insertions(+), 4 deletions(-) -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index bf1d71b62c4f..40be4979102d 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -102,8 +102,10 @@ static const pteval_t modifiable_attr_mask = PTE_PXN | PTE_RDONLY | PTE_WRITE; static void alloc_init_pte(pmd_t *pmd, unsigned long addr, unsigned long end, unsigned long pfn, pgprot_t prot, - phys_addr_t (*pgtable_alloc)(void)) + phys_addr_t (*pgtable_alloc)(void), + bool page_mappings_only) { + pgprot_t __prot = prot; pte_t *pte; BUG_ON(pmd_sect(*pmd)); @@ -121,7 +123,18 @@ static void alloc_init_pte(pmd_t *pmd, unsigned long addr, do { pte_t old_pte = *pte; - set_pte(pte, pfn_pte(pfn, prot)); + /* + * Set the contiguous bit for the subsequent group of PTEs if + * its size and alignment are appropriate. + */ + if (((addr | PFN_PHYS(pfn)) & ~CONT_PTE_MASK) == 0) { + if (end - addr >= CONT_PTE_SIZE && !page_mappings_only) + __prot = __pgprot(pgprot_val(prot) | PTE_CONT); + else + __prot = prot; + } + + set_pte(pte, pfn_pte(pfn, __prot)); pfn++; /* @@ -141,6 +154,7 @@ static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end, phys_addr_t (*pgtable_alloc)(void), bool page_mappings_only) { + pgprot_t __prot = prot; pmd_t *pmd; unsigned long next; @@ -167,7 +181,19 @@ static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end, /* try section mapping first */ if (((addr | next | phys) & ~SECTION_MASK) == 0 && !page_mappings_only) { - pmd_set_huge(pmd, phys, prot); + /* + * Set the contiguous bit for the subsequent group of + * PMDs if its size and alignment are appropriate. + */ + if (((addr | phys) & ~CONT_PMD_MASK) == 0) { + if (end - addr >= CONT_PMD_SIZE) + __prot = __pgprot(pgprot_val(prot) | + PTE_CONT); + else + __prot = prot; + } + + pmd_set_huge(pmd, phys, __prot); /* * After the PMD entry has been populated once, we @@ -178,7 +204,8 @@ static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end, ~modifiable_attr_mask) != 0); } else { alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), - prot, pgtable_alloc); + prot, pgtable_alloc, + page_mappings_only); BUG_ON(pmd_val(old_pmd) != 0 && pmd_val(old_pmd) != pmd_val(*pmd));