From patchwork Wed Mar 10 23:31:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhaumik Bhatt X-Patchwork-Id: 396839 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B60ABC433DB for ; Wed, 10 Mar 2021 23:32:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 799EA64FD2 for ; Wed, 10 Mar 2021 23:32:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231935AbhCJXbe (ORCPT ); Wed, 10 Mar 2021 18:31:34 -0500 Received: from m42-2.mailgun.net ([69.72.42.2]:51485 "EHLO m42-2.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233862AbhCJXbb (ORCPT ); Wed, 10 Mar 2021 18:31:31 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1615419090; h=Message-Id: Date: Subject: Cc: To: From: Sender; bh=fJgSNAtNOSQYHxSkDAEXaeZo3asWJynHwNzFn3+wiL0=; b=vH2DmNIPfNPQVzhMpTPPgqr2vg5bVY/w6LeAMO6xc2HRUFH9k396fv3z3Zmdz+e4+pROeoKj pMU3ejWpCDMycH1YjNitPeaWIHnxlEjBXPQzdm6WbKpmU5WyOxQE2GouCK8+PHB8cvhlQgl3 DQYC76DZwPX1Wnde+HLwXz9HwwM= X-Mailgun-Sending-Ip: 69.72.42.2 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n02.prod.us-west-2.postgun.com with SMTP id 604956d2b2591bd5687579ac (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Wed, 10 Mar 2021 23:31:30 GMT Sender: bbhatt=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 354F9C433C6; Wed, 10 Mar 2021 23:31:30 +0000 (UTC) Received: from malabar-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: bbhatt) by smtp.codeaurora.org (Postfix) with ESMTPSA id 66DD1C433CA; Wed, 10 Mar 2021 23:31:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 66DD1C433CA Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=bbhatt@codeaurora.org From: Bhaumik Bhatt To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, carl.yin@quectel.com, naveen.kumar@quectel.com, loic.poulain@linaro.org, Bhaumik Bhatt Subject: [PATCH v4 0/3] Polling for MHI ready Date: Wed, 10 Mar 2021 15:31:17 -0800 Message-Id: <1615419080-26540-1-git-send-email-bbhatt@codeaurora.org> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org v4: -Added reviewed-by tag -Return appropriate error code from mhi_poll_reg_field() -Fixed bug where mhi_poll_reg_field() returns success if polling times out -Added an interval_us variable in mhi_ready_state_transition() v3: -Removed config changes that crept in in the first patch v2: -Addressed review comments -Introduce new patch for to use controller defined read_reg() for polling -Add usage in RDDM download panic path as well Use polling instead of interrupt driven approach to wait for MHI ready state. In certain devices, it is likely that there is no incoming MHI interrupt for a transition to MHI READY state. One such example is the move from Pass Through to an SBL or AMSS execution environment. In order to facilitate faster bootup times as there is no need to wait until timeout_ms completes, MHI host can poll every 25 milliseconds to check if device has entered MHI READY until a maximum timeout of twice the timeout_ms is reached. This patch series has been tested on an arm64 device. Bhaumik Bhatt (3): bus: mhi: core: Introduce internal register poll helper function bus: mhi: core: Move to polling method to wait for MHI ready bus: mhi: core: Use poll register read API for RDDM download drivers/bus/mhi/core/boot.c | 20 ++++++-------------- drivers/bus/mhi/core/internal.h | 3 +++ drivers/bus/mhi/core/main.c | 23 +++++++++++++++++++++++ drivers/bus/mhi/core/pm.c | 32 +++++++++++++++----------------- 4 files changed, 47 insertions(+), 31 deletions(-)