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[v9,00/12] Add soundcard support for sc7280 based platforms.

Message ID 1650552459-21077-1-git-send-email-quic_srivasam@quicinc.com
Headers show
Series Add soundcard support for sc7280 based platforms. | expand

Message

Srinivasa Rao Mandadapu April 21, 2022, 2:47 p.m. UTC
This patch set is to add bolero digital macros, WCD and maxim codecs nodes
for audio on sc7280 based platforms.

This patch set depends on:
    -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=631506
    -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=601249
    -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=634203
    -- Clock reset control patches

Changes Since V8:
    -- Split patches as per sc7280 CRD revision 3, 4 and 5 boards.
    -- Add corresponding dt nodes for herobrine crd boards.
    -- Update dai-link node names as per dt-bindings in sound node.
    -- Add reg property in sound node as per dt-bindings which was removed in previous series.
    -- Fix typo errors.
    -- Update wcd codec pin control properties in board specific files.
Changes Since V7:
    -- Remove redundant interrupt names in soundwire node.
    -- Fix typo errors.
    -- Remove redundant reg property in sound node.
    -- Rebased on top of latest kernel tip.
Changes Since V6:
    -- Modify link-names and audio routing in a sound node.
    -- Move amp_en pin control node to appropriate consumer patch.
    -- Split patches as per digital macro codecs and board specific codecs and sort it.
    -- Modify label and node names to lpass specific.
Changes Since V5:
    -- Move soc specific bolero digital codec nodes to soc specific file.
    -- Bring wcd938x codec reset pin control and US/EURO HS selection nodes from other series.
    -- Change node name and remove redundant status property in sound node.
Changes Since V4:
    -- Update nodes in sorting order.
    -- Update DTS node names as per dt-bindings.
    -- Update Node properties in proper order.
    -- Update missing pinctrl properties like US/EURO HS selection, wcd reset control.
    -- Remove redundant labels.
    -- Remove unused size cells and address cells in tx macro node.
    -- Keep all same nodes at one place, which are defined in same file.
    -- Add max98360a codec node to herobrine board specific targets.
Changes Since V3:
    -- Move digital codec macro nodes to board specific dtsi file.
    -- Update pin controls in lpass cpu node.
    -- Update dependency patch list.
    -- Create patches on latest kernel.
Changes Since V2:
    -- Add power domains to digital codec macro nodes.
    -- Change clock node usage in lpass cpu node.
    -- Add codec mem clock to lpass cpu node.
    -- Modify the node names to be generic.
    -- Move sound and codec nodes to root node.
    -- sort dai links as per reg.
    -- Fix typo errors.
Changes Since V1:
    -- Update the commit message of cpu node patch.
    -- Add gpio control property to support Euro headset in wcd938x node.
    -- Fix clock properties in lpass cpu and digital codec macro node.

Srinivasa Rao Mandadapu (12):
  arm64: dts: qcom: sc7280: Add nodes for soundwire and va tx rx digital
    macro codecs
  arm64: dts: qcom: sc7280: Enable digital codecs and soundwire for CRD
    1.0 and CRD 2.0
  arm64: dts: qcom: sc7280: Enable digital codecs and soundwire for CRD
    3.0/3.1
  arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0 and CRD
    2.0
  arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 3.0/3.1
  arm64: dts: qcom: sc7280: Add max98360a codec for CRD 1.0 and 2.0
  arm64: dts: qcom: sc7280: Add max98360a codec node for CRD 3.0/3.1
  arm64: dts: qcom: sc7280: Add lpass cpu node
  arm64: dts: qcom: sc7280: Enable lpass cpu node for CRD 1.0 and CRD
    2.0
  arm64: dts: qcom: sc7280: Enable lpass cpu node for CRD 3.0/3.1
  arm64: dts: qcom: sc7280: Add sound node for CRD 1.0 and CRD 2.0
  arm64: dts: qcom: sc7280: Add sound node for CRD 3.0/3.1

 arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts        |  31 +++
 arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 213 ++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi    |   8 +
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi          | 225 ++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sc7280.dtsi              | 190 ++++++++++++++++++
 5 files changed, 667 insertions(+)

Comments

Matthias Kaehlcke April 21, 2022, 4:44 p.m. UTC | #1
On Thu, Apr 21, 2022 at 08:17:31PM +0530, Srinivasa Rao Mandadapu wrote:

> arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0 and CRD 2.0

nit: and IDP boards?

> Add wcd9385 codec node for audio use case on sc7280 based platforms
> of revision 3 and 4 (aka CRD 1.0 and 2.0).
> Add tlmm gpio property for switching CTIA/OMTP Headset.
> 
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts |  8 +++++
>  arch/arm64/boot/dts/qcom/sc7280-idp.dtsi   | 50 ++++++++++++++++++++++++++++++
>  2 files changed, 58 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
> index 344338a..462d655 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
> @@ -87,6 +87,14 @@ ap_ts_pen_1v8: &i2c13 {
>  	pins = "gpio51";
>  };
>  
> +&wcd938x {
> +	pinctrl-names = "default", "sleep", "us_euro_hs_sel";
> +	pinctrl-0 = <&wcd_reset_n>;
> +	pinctrl-1 = <&wcd_reset_n_sleep>;
> +	pinctrl-2 = <&us_euro_hs_sel>;

Which driver is supposed to select 'us_euro_hs_sel'?

I suppose 'us_euro_hs_sel' should always be configured in the same way,
so you probably want this:

	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
	pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;

> +	us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
> +};
> +
>  &tlmm {
>  	tp_int_odl: tp-int-odl {
>  		pins = "gpio7";
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> index 6cb5fc4..b711ad0 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> @@ -20,6 +20,34 @@
>  		serial1 = &uart7;
>  	};
>  
> +	wcd938x: audio-codec-1 {
> +		compatible = "qcom,wcd9385-codec";
> +		pinctrl-names = "default", "sleep";
> +		pinctrl-0 = <&wcd_reset_n>;
> +		pinctrl-1 = <&wcd_reset_n_sleep>;
> +
> +		reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
> +
> +		qcom,rx-device = <&wcd_rx>;
> +		qcom,tx-device = <&wcd_tx>;
> +
> +		vdd-rxtx-supply = <&vreg_l18b_1p8>;
> +		vdd-io-supply = <&vreg_l18b_1p8>;
> +		vdd-buck-supply = <&vreg_l17b_1p8>;
> +		vdd-mic-bias-supply = <&vreg_bob>;
> +
> +		qcom,micbias1-microvolt = <1800000>;
> +		qcom,micbias2-microvolt = <1800000>;
> +		qcom,micbias3-microvolt = <1800000>;
> +		qcom,micbias4-microvolt = <1800000>;
> +
> +		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
> +							  500000 500000 500000>;
> +		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
> +		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
> +		#sound-dai-cells = <1>;
> +	};
> +
>  	gpio-keys {
>  		compatible = "gpio-keys";
>  		label = "gpio-keys";
> @@ -678,6 +706,28 @@
>  		function = "gpio";
>  		bias-pull-down;
>  	};
> +
> +	us_euro_hs_sel: us-euro-hs-sel {
> +		pins = "gpio81";
> +		function = "gpio";
> +		bias-pull-down;
> +		drive-strength = <2>;
> +	};

This config is only used by the CRD, move it to sc7280-crd-r3.dts

> +
> +	wcd_reset_n: wcd-reset-n {
> +		pins = "gpio83";
> +		function = "gpio";
> +		drive-strength = <8>;
> +		output-high;
> +	};
> +
> +	wcd_reset_n_sleep: wcd-reset-n-sleep {
> +		pins = "gpio83";
> +		function = "gpio";
> +		drive-strength = <8>;
> +		bias-disable;
> +		output-low;
> +	};
>  };
>  
>  &remoteproc_wpss {
> -- 
> 2.7.4
>
Matthias Kaehlcke April 21, 2022, 5 p.m. UTC | #2
On Thu, Apr 21, 2022 at 08:17:33PM +0530, Srinivasa Rao Mandadapu wrote:

> Subject: arm64: dts: qcom: sc7280: Add max98360a codec for CRD 1.0 and 2.0

nit: and the IDP boards?

> Add max98360a codec node for audio use case on revision 3 and
> 4 (aka CRD 1.0 and 2.0) boards.
> Add amp_en node for max98360a codec pin control.
> 
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Srinivasa Rao Mandadapu April 22, 2022, 1:46 p.m. UTC | #3
On 4/21/2022 10:27 PM, Matthias Kaehlcke wrote:
Thanks for your time Matthias!!!
> On Thu, Apr 21, 2022 at 08:17:32PM +0530, Srinivasa Rao Mandadapu wrote:
>> Add wcd9385 codec node for audio use case on CRD rev5 (aka CRD 3.0/3.1)
> nit: rev5+
Okay.
>> boards. Add tlmm gpio property for switching CTIA/OMTP Headset.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 52 +++++++++++++++++++++++
>>   1 file changed, 52 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
>> index d0794f2..d6a3086 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
>> @@ -12,6 +12,36 @@
>>   / {
>>   	model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)";
>>   	compatible = "google,hoglin", "qcom,sc7280";
>> +
>> +	wcd938x: audio-codec-1 {
> wcd9385 (same for the CRD <= 2.0, I missed it there).
Okay.
>
>> +		compatible = "qcom,wcd9385-codec";
>
>
>> +		pinctrl-names = "default", "sleep", "us_euro_hs_sel";
>> +		pinctrl-0 = <&wcd_reset_n>;
>> +		pinctrl-1 = <&wcd_reset_n_sleep>;
>> +		pinctrl-2 = <&us_euro_hs_sel>;
> This looks wrong, see my comment on the CRD <= 2.0 patch
> (https://patchwork.kernel.org/project/linux-arm-msm/patch/1650552459-21077-5-git-send-email-quic_srivasam@quicinc.com/)
Okay. Will modify accordingly.
>
>> +
>> +		reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
>> +		us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
>> +
>> +		qcom,rx-device = <&wcd_rx>;
>> +		qcom,tx-device = <&wcd_tx>;
>> +
>> +		vdd-rxtx-supply = <&vreg_l18b_1p8>;
>> +		vdd-io-supply = <&vreg_l18b_1p8>;
>> +		vdd-buck-supply = <&vreg_l17b_1p8>;
>> +		vdd-mic-bias-supply = <&vreg_bob>;
>> +
>> +		qcom,micbias1-microvolt = <1800000>;
>> +		qcom,micbias2-microvolt = <1800000>;
>> +		qcom,micbias3-microvolt = <1800000>;
>> +		qcom,micbias4-microvolt = <1800000>;
>> +
>> +		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
>> +							  500000 500000 500000>;
>> +		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
>> +		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
>> +		#sound-dai-cells = <1>;
>> +	};
> The wcd9385 is on the qcard, so I think this node should be added to
> sc7280-qcard.dtsi and be marked as "disabled". This file can then just
> set the status to "okay". Future boards that use the wcd could do the
> same, rather than adding a copy of this node to their .dts file.
Okay. Will move to qcard dtsi file.
>
>>   };
>>   
>>   /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
>> @@ -345,4 +375,26 @@ ap_ts_pen_1v8: &i2c13 {
>>   			  "",
>>   			  "",
>>   			  "";
>> +
>> +	us_euro_hs_sel: us-euro-hs-sel {
>> +		pins = "gpio81";
>> +		function = "gpio";
>> +		bias-pull-down;
>> +		drive-strength = <2>;
>> +	};
>> +
>> +	wcd_reset_n: wcd-reset-n {
>> +		pins = "gpio83";
>> +		function = "gpio";
>> +		drive-strength = <8>;
>> +		output-high;
>> +	};
>> +
>> +	wcd_reset_n_sleep: wcd-reset-n-sleep {
>> +		pins = "gpio83";
>> +		function = "gpio";
>> +		drive-strength = <8>;
>> +		bias-disable;
>> +		output-low;
>> +	};
> These are also on the qcard, please move the nodes to sc7280-qcard.dtsi
Okay.
Srinivasa Rao Mandadapu April 22, 2022, 1:49 p.m. UTC | #4
On 4/21/2022 10:43 PM, Matthias Kaehlcke wrote:
Thanks for your time Matthias!!!
> On Thu, Apr 21, 2022 at 08:17:36PM +0530, Srinivasa Rao Mandadapu wrote:
>
>> Subject: arm64: dts: qcom: sc7280: Enable lpass cpu node for CRD 1.0 and CRD 2.0
> nit: and the IDP boards?
Okay.
>
>> Enable lpass cpu node for audio on sc7280 based platforms of revision 3
>> and 4 (aka CRD 1.0 and 2.0) boards.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
>> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
>> ---
>>   arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 28 ++++++++++++++++++++++++++++
>>   1 file changed, 28 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> index 24196a1..2e991e8 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> @@ -274,6 +274,34 @@
>>   	modem-init;
>>   };
>>   
>> +&lpass_cpu {
>> +	status = "okay";
>> +
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
>> +
>> +	dai-link@1 {
>> +		reg = <MI2S_SECONDARY>;
>> +		qcom,playback-sd-lines = <0>;
>> +	};
>> +
>> +	dai-link@5 {
>> +		reg = <LPASS_DP_RX>;
>> +	};
>> +
>> +	dai-link@6 {
>> +		reg = <LPASS_CDC_DMA_RX0>;
>> +	};
>> +
>> +	dai-link@19 {
>> +		reg = <LPASS_CDC_DMA_TX3>;
>> +	};
>> +
>> +	dai-link@25 {
>> +		reg = <LPASS_CDC_DMA_VA_TX0>;
>> +	};
>> +};
>> +
>>   &lpass_rx_macro {
>>   	status = "okay";
>>   };
>> -- 
>> 2.7.4
>>
Srinivasa Rao Mandadapu April 22, 2022, 1:52 p.m. UTC | #5
On 4/21/2022 11:33 PM, Matthias Kaehlcke wrote:

Thanks for your time Matthias!!!
> On Thu, Apr 21, 2022 at 08:17:39PM +0530, Srinivasa Rao Mandadapu wrote:
>> Add dt nodes for sound card support on rev5 (aka CRD 3.0/3.1) boards,
>> which is using WCD938x headset playback, capture, I2S speaker playback
>> and DMICs via VA macro.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 98 +++++++++++++++++++++++
>>   1 file changed, 98 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
>> index 4033d2a..bc6dbcc 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
>> @@ -42,6 +42,104 @@
>>   		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
>>   		#sound-dai-cells = <1>;
>>   	};
>> +
>> +	sound: sound {
>> +		compatible = "google,sc7280-herobrine";
>> +		model = "sc7280-wcd938x-max98360a-1mic";
>> +
>> +		audio-routing =
>> +			"IN1_HPHL", "HPHL_OUT",
>> +			"IN2_HPHR", "HPHR_OUT",
>> +			"AMIC1", "MIC BIAS1",
>> +			"AMIC2", "MIC BIAS2",
>> +			"VA DMIC0", "MIC BIAS1",
>> +			"VA DMIC1", "MIC BIAS1",
>> +			"VA DMIC2", "MIC BIAS3",
>> +			"VA DMIC3", "MIC BIAS3",
>> +			"TX SWR_ADC0", "ADC1_OUTPUT",
>> +			"TX SWR_ADC1", "ADC2_OUTPUT",
>> +			"TX SWR_ADC2", "ADC3_OUTPUT",
>> +			"TX SWR_DMIC0", "DMIC1_OUTPUT",
>> +			"TX SWR_DMIC1", "DMIC2_OUTPUT",
>> +			"TX SWR_DMIC2", "DMIC3_OUTPUT",
>> +			"TX SWR_DMIC3", "DMIC4_OUTPUT",
>> +			"TX SWR_DMIC4", "DMIC5_OUTPUT",
>> +			"TX SWR_DMIC5", "DMIC6_OUTPUT",
>> +			"TX SWR_DMIC6", "DMIC7_OUTPUT",
>> +			"TX SWR_DMIC7", "DMIC8_OUTPUT";
>> +
>> +		qcom,msm-mbhc-hphl-swh = <1>;
>> +		qcom,msm-mbhc-gnd-swh = <1>;
>> +
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +		#sound-dai-cells = <0>;
>> +
>> +		dai-link@0 {
>> +			link-name = "MAX98360A";
>> +			reg = <MI2S_SECONDARY>;
> same comment as for "arm64: dts: qcom: sc7280: Add sound node for CRD
> 1.0 and CRD 2.0", i.e. use the link number for 'reg' instead of the lpass
> DAI id.
Okay. Will update accordingly.
>
>> +
>> +			cpu {
>> +				sound-dai = <&lpass_cpu MI2S_SECONDARY>;
>> +			};
>> +
>> +			codec {
>> +				sound-dai = <&max98360a>;
>> +			};
>> +		};
>> +
>> +		dai-link@1 {
>> +			link-name = "DisplayPort";
>> +			reg = <LPASS_DP_RX>;
>> +
>> +			cpu {
>> +				sound-dai = <&lpass_cpu LPASS_DP_RX>;
>> +			};
>> +
>> +			codec {
>> +				sound-dai = <&mdss_dp>;
>> +			};
>> +		};
>> +
>> +		dai-link@2 {
>> +			link-name = "WCD9385 Playback";
>> +			reg = <LPASS_CDC_DMA_RX0>;
>> +
>> +			cpu {
>> +				sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
>> +			};
>> +
>> +			codec {
>> +				sound-dai = <&wcd938x 0>, <&swr0 0>, <&lpass_rx_macro 0>;
>> +			};
>> +		};
>> +
>> +		dai-link@3 {
>> +			link-name = "WCD9385 Capture";
>> +			reg = <LPASS_CDC_DMA_TX3>;
>> +
>> +			cpu {
>> +				sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
>> +			};
>> +
>> +			codec {
>> +				sound-dai = <&wcd938x 1>, <&swr1 0>, <&lpass_tx_macro 0>;
>> +			};
>> +		};
>> +
>> +		dai-link@4 {
>> +			link-name = "DMIC";
>> +			reg = <LPASS_CDC_DMA_VA_TX0>;
>> +
>> +			cpu {
>> +				sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
>> +			};
>> +
>> +			codec {
>> +				sound-dai = <&lpass_va_macro 0>;
>> +			};
>> +		};
>> +	};
>>   };