| Message ID | 1675700201-12890-1-git-send-email-quic_srivasam@quicinc.com |
|---|---|
| Headers | show |
| Series | Add SC7280 audioreach device tree nodes | expand |
On 06/02/2023 17:16, Srinivasa Rao Mandadapu wrote: > Split common idp dtsi file into audio specific dtsi and common > idp dtsi file. > > It is required to isolate idp and crd-rev3 platform device tree nodes > and convert crd-rev3 platform device tree nodes into audioreach specific > device tree nodes. > > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 06/02/2023 17:16, Srinivasa Rao Mandadapu wrote: > Split common idp dtsi file into audio specific dtsi and common > idp dtsi file. > > It is required to isolate idp and crd-rev3 platform device tree nodes > and convert crd-rev3 platform device tree nodes into audioreach specific > device tree nodes. > > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi | 135 +++++++++++++++++++++++++ > arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 1 + > arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 126 ----------------------- > 3 files changed, 136 insertions(+), 126 deletions(-) Actually you need to rebase on latest Bjorn's tree or linux-next as few properties were removed, so you need to remove them from sc7280-audio-idp.dtsi: https://lore.kernel.org/all/20230119122205.73372-2-krzysztof.kozlowski@linaro.org/ Best regards, Krzysztof
Quoting Srinivasa Rao Mandadapu (2023-02-06 08:16:36) > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > index 1810a36..5e99f49 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > @@ -107,3 +107,7 @@ > }; > }; > }; > + > +&remoteproc_adsp { > + status = "okay"; > +}; Sort this file by phandle alphabetically? > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 6908bca..27ab992 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -3439,6 +3441,97 @@ > status = "disabled"; > }; > > + remoteproc_adsp: remoteproc@3000000 { This should be sorted on physical address. I think the node above is spi@88dc000 so this is in the wrong place. > + compatible = "qcom,sc7280-adsp-pil"; > + reg = <0 0x03000000 0 0x5000>, <0 0x0355b000 0 0x10>; > + reg-names = "qdsp6ss_base", "lpass_efuse"; > + > + interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, > + <&adsp_smp2p_in 0 IRQ_TYPE_NONE>, Can these have proper irq flags? Doubtful they're IRQ_TYPE_NONE. > + <&adsp_smp2p_in 1 IRQ_TYPE_NONE>, > + <&adsp_smp2p_in 2 IRQ_TYPE_NONE>, > + <&adsp_smp2p_in 3 IRQ_TYPE_NONE>, > + <&adsp_smp2p_in 7 IRQ_TYPE_NONE>; > + > + interrupt-names = "wdog", "fatal", "ready", > + "handover", "stop-ack", > + "shutdown-ack"; > + > + qcom,qmp = <&aoss_qmp>; > + > + clocks = <&rpmhcc RPMH_CXO_CLK>, > + <&gcc GCC_CFG_NOC_LPASS_CLK>; > + Drop newline so clocks properties are together please. > + clock-names = "xo", "gcc_cfg_noc_lpass"; > + > + iommus = <&apps_smmu 0x1800 0x0>; > + > + power-domains = <&rpmhpd SC7280_CX>; > + power-domain-names = "cx"; > + > + required-opps = <&rpmhpd_opp_nom>; > + > + resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>, > + <&aoss_reset AOSS_CC_LPASS_RESTART>; > + Drop newline so reset properties are together please. > + reset-names = "pdc_sync", "cc_lpass"; > + qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x8000 0x13000>; > + > + memory-region = <&adsp_mem>; > + > + qcom,smem-states = <&adsp_smp2p_out 0>; > + qcom,smem-state-names = "stop"; > + > + status = "disabled"; > + > + glink-edge { > + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS > + IPCC_MPROC_SIGNAL_GLINK_QMP > + IRQ_TYPE_EDGE_RISING>; > + > + mboxes = <&ipcc IPCC_CLIENT_LPASS > + IPCC_MPROC_SIGNAL_GLINK_QMP>; > + > + label = "lpass"; > + qcom,remote-pid = <2>; > + > + gpr { This node name should be apr per the qcom,glink-edge.yaml binding? > + compatible = "qcom,gpr"; > + qcom,glink-channels = "adsp_apps"; > + qcom,domain = <GPR_DOMAIN_ID_ADSP>; > + qcom,intents = <512 20>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + q6apm: service@1 { > + compatible = "qcom,q6apm"; > + reg = <GPR_APM_MODULE_IID>; > + #sound-dai-cells = <0>; > + > + q6apmdai: dais { > + compatible = "qcom,q6apm-dais"; > + iommus = <&apps_smmu 0x1801 0x0>; > + }; > + > + q6apmbedai: bedais { > + compatible = "qcom,q6apm-lpass-dais"; > + #sound-dai-cells = <1>; > + }; > + }; > + > + q6prm: service@2 { > + compatible = "qcom,q6prm"; > + reg = <GPR_PRM_MODULE_IID>; > + > + q6prmcc: clock-controller { > + compatible = "qcom,q6prm-lpass-clocks"; This is clk binding but not a clk driver? I'll look away now. > + #clock-cells = <2>; > + }; > + }; > + }; > + }; > + }; > +
Quoting Srinivasa Rao Mandadapu (2023-02-06 08:16:38) > Update lpass_tlmm clock properties, as different clock sources > are required in ADSP enabled platforms. > Also update LPASS_MCC register region. This is required to avoid > memory region conflicts due to overlapping lpass_efuse Q6 regmap > region used in LPASS PIL node. If efuse is overlapping, why isn't that made into an nvmem device that can be used or not used depending on the configuration?
On 06/02/2023 17:16, Srinivasa Rao Mandadapu wrote: > Add LPASS PIL node for sc7280 based audioreach platforms. > > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> > --- > .../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 4 + > arch/arm64/boot/dts/qcom/sc7280.dtsi | 93 ++++++++++++++++++++++ > 2 files changed, 97 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > index 1810a36..5e99f49 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > @@ -107,3 +107,7 @@ > }; > }; > }; > + > +&remoteproc_adsp { Are you sure this is ordered by name? > + status = "okay"; > +}; There is lpasscc@3000000 so aren't you now enabling two nodes for the same address? > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 6908bca..27ab992 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -8,6 +8,7 @@ > #include <dt-bindings/clock/qcom,dispcc-sc7280.h> > #include <dt-bindings/clock/qcom,gcc-sc7280.h> > #include <dt-bindings/clock/qcom,gpucc-sc7280.h> > +#include <dt-bindings/clock/qcom,lpass-sc7280.h> > #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> > #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> > #include <dt-bindings/clock/qcom,rpmh.h> > @@ -21,6 +22,7 @@ > #include <dt-bindings/power/qcom-rpmpd.h> > #include <dt-bindings/reset/qcom,sdm845-aoss.h> > #include <dt-bindings/reset/qcom,sdm845-pdc.h> > +#include <dt-bindings/soc/qcom,gpr.h> > #include <dt-bindings/soc/qcom,rpmh-rsc.h> > #include <dt-bindings/sound/qcom,lpass.h> > #include <dt-bindings/thermal/thermal.h> > @@ -3439,6 +3441,97 @@ > status = "disabled"; > }; > > + remoteproc_adsp: remoteproc@3000000 { > + compatible = "qcom,sc7280-adsp-pil"; > + reg = <0 0x03000000 0 0x5000>, <0 0x0355b000 0 0x10>; > + reg-names = "qdsp6ss_base", "lpass_efuse"; Does not look like you tested the DTS against bindings. Please run `make dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst for instructions). You can test against specific schema with DT_SCHEMA_FILES > + > + interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, > + <&adsp_smp2p_in 0 IRQ_TYPE_NONE>, > + <&adsp_smp2p_in 1 IRQ_TYPE_NONE>, > + <&adsp_smp2p_in 2 IRQ_TYPE_NONE>, > + <&adsp_smp2p_in 3 IRQ_TYPE_NONE>, > + <&adsp_smp2p_in 7 IRQ_TYPE_NONE>; > + > + interrupt-names = "wdog", "fatal", "ready", > + "handover", "stop-ack", > + "shutdown-ack"; > + > + qcom,qmp = <&aoss_qmp>; > + > + clocks = <&rpmhcc RPMH_CXO_CLK>, > + <&gcc GCC_CFG_NOC_LPASS_CLK>; > + > + clock-names = "xo", "gcc_cfg_noc_lpass"; > + > + iommus = <&apps_smmu 0x1800 0x0>; > + > + power-domains = <&rpmhpd SC7280_CX>; > + power-domain-names = "cx"; Here as well. Binding says it is LCX domain. > + > + required-opps = <&rpmhpd_opp_nom>; This should also fail... please send code for review only if there are no warnings. > + > + resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>, > + <&aoss_reset AOSS_CC_LPASS_RESTART>; > + > + reset-names = "pdc_sync", "cc_lpass"; > + qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x8000 0x13000>; > + > + memory-region = <&adsp_mem>; > + > + qcom,smem-states = <&adsp_smp2p_out 0>; > + qcom,smem-state-names = "stop"; > + > + status = "disabled"; > + > + glink-edge { > + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS > + IPCC_MPROC_SIGNAL_GLINK_QMP > + IRQ_TYPE_EDGE_RISING>; > + > + mboxes = <&ipcc IPCC_CLIENT_LPASS > + IPCC_MPROC_SIGNAL_GLINK_QMP>; > + > + label = "lpass"; > + qcom,remote-pid = <2>; > + > + gpr { > + compatible = "qcom,gpr"; > + qcom,glink-channels = "adsp_apps"; > + qcom,domain = <GPR_DOMAIN_ID_ADSP>; > + qcom,intents = <512 20>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + q6apm: service@1 { > + compatible = "qcom,q6apm"; > + reg = <GPR_APM_MODULE_IID>; > + #sound-dai-cells = <0>; That's also wrong and test would point the issue. Best regards, Krzysztof
On 06/02/2023 17:16, Srinivasa Rao Mandadapu wrote: > Update lpass_tlmm clock properties, as different clock sources All your subjects are vague. Everything is "update". That's not acceptable subject. > are required in ADSP enabled platforms. > Also update LPASS_MCC register region. This is required to avoid > memory region conflicts due to overlapping lpass_efuse Q6 regmap > region used in LPASS PIL node. > > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> > --- > .../arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > index 9b04491..86ba4a5 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > @@ -121,6 +121,15 @@ > status = "okay"; > }; > > +&lpass_tlmm { > + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; > + > + clock-names = "core", "audio"; > + reg = <0 0x033c0000 0x0 0x20000>, > + <0 0x03550000 0x0 0xa100>; Are you sure your patchset is bisectable? The conflict is already there - via patch #3 - isn't it? > +}; > + > &lpass_tx_macro { > /delete-property/ power-domains; > /delete-property/ power-domain-names; Best regards, Krzysztof
On 06/02/2023 17:16, Srinivasa Rao Mandadapu wrote: > Add reg-names and power-domain-names for remoteproc ADSP pheripheral typo: peripheral > loader. Add firmware-name property to distinguish and load different > firmware binaries of various vendors. > Change qcom,halt-regs property phandle to tcsr_1 from tcsr_mutex. > Also add required-opps property and change power domain from LCX to CX, > which is actual PD to be controlled, for setting appropriate > performance state. > This is to make compatible with remoteproc ADSP PIL driver and > latest device tree changes. > > Fixes: 8490a99586ab ("dt-bindings: remoteproc: qcom: Add SC7280 ADSP support") > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/remoteproc/qcom,sc7280-adsp-pil.yaml | 30 +++++++++++++++++++--- > 1 file changed, 26 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml > index 94ca7a0..7addc7d 100644 > --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml > +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml > @@ -23,6 +23,11 @@ properties: > - description: qdsp6ss register > - description: efuse q6ss register > > + reg-names: > + items: > + - const: qdsp6ss_base > + - const: lpass_efuse So your commit adding the bindings: https://lore.kernel.org/all/1664368073-13659-2-git-send-email-quic_srivasam@quicinc.com/ was already incomplete because the same patchset added undocumented properties. I have no clue what is happening with AudioReach sound/ADSP code - it's like random set of changes here and there, without coordination. Drivers come without bindings, DTS comes before bindings... Is your DTS in this patches matching this binding? If so, usage cannot be before the binding is introduced. Best regards, Krzysztof
On 09/02/2023 23:55, Stephen Boyd wrote: >> + >> + glink-edge { >> + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS >> + IPCC_MPROC_SIGNAL_GLINK_QMP >> + IRQ_TYPE_EDGE_RISING>; >> + >> + mboxes = <&ipcc IPCC_CLIENT_LPASS >> + IPCC_MPROC_SIGNAL_GLINK_QMP>; >> + >> + label = "lpass"; >> + qcom,remote-pid = <2>; >> + >> + gpr { > > This node name should be apr per the qcom,glink-edge.yaml binding? No, this is correct. I fixed the glink-edge binding last year. > >> + compatible = "qcom,gpr"; >> + qcom,glink-channels = "adsp_apps"; >> + qcom,domain = <GPR_DOMAIN_ID_ADSP>; >> + qcom,intents = <512 20>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + q6apm: service@1 { >> + compatible = "qcom,q6apm"; >> + reg = <GPR_APM_MODULE_IID>; >> + #sound-dai-cells = <0>; >> + >> + q6apmdai: dais { >> + compatible = "qcom,q6apm-dais"; >> + iommus = <&apps_smmu 0x1801 0x0>; >> + }; >> + >> + q6apmbedai: bedais { >> + compatible = "qcom,q6apm-lpass-dais"; >> + #sound-dai-cells = <1>; >> + }; >> + }; >> + >> + q6prm: service@2 { >> + compatible = "qcom,q6prm"; >> + reg = <GPR_PRM_MODULE_IID>; >> + >> + q6prmcc: clock-controller { >> + compatible = "qcom,q6prm-lpass-clocks"; > > This is clk binding but not a clk driver? I'll look away now. It is a clock driver which was not put into clk. Maybe because it is tightly tied to entire QDSP platform. Best regards, Krzysztof
Add SC7280 audioreach device tree nodes and extract audio specific dtsi nodes and add them in new file. This patch series depends on: -- https://patchwork.kernel.org/project/linux-clk/list/?series=717985 Corresponding dt-bindings not mainlined yet. -- https://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux.git/commit/?h=rproc-next&id=8490a99586abd480d7139893f78c019790a58979 Changes Since v4: -- Modify lpasscc clock controller node name. -- Disable lpass_core node. -- Modify Model name in sound node in "Add sound node for crd-rev3 board" patch. -- Remove protection domain property in "Add LPASS PIL node". Changes Since v3: -- Remove deleting digital codecs in crd-rev3 board specific dtsi and upadate them using phandle. -- Update commit message in "Update lpass_tlmm node" patch. -- Change the position of status property in LPASS PIL node. -- Update commit message in "Add sound node" patch. Changes Since v2: -- Remove Patch related to Add CGCR reset property. -- Remove Patch related to Disable legacy path clock nodes. -- Add dt-bindings for missing properties. -- Change the order of nodes. -- Move digictal codec macro nodes to root node from soc node. -- Add adsp-pil-mode property in required clock nodes. Changes Since v1: -- Move remoteproc node to soc dtsi file. -- Add qcom, adsp-pil-mode reg property in lpasscc node. -- Fix typo errors. -- Remove redundant status properties. Srinivasa Rao Mandadapu (8): arm64: dts: qcom: sc7280: Extract audio nodes from common idp dtsi file arm64: dts: qcom: sc7280: Add sound node for crd-rev3 board arm64: dts: qcom: sc7280: Add LPASS PIL node arm64: dts: qcom: sc7280: Update VA/RX/TX macro clock nodes arm64: dts: qcom: sc7280: Update lpass_tlmm node arm64: dts: qcom: sc7280: Add qcom,adsp-pil-mode property in clock nodes arm64: dts: qcom: sc7280: Modify lpasscc node name dt-bindings: remoteproc: qcom: sc7280-adsp-pil: Add missing properties .../bindings/remoteproc/qcom,sc7280-adsp-pil.yaml | 30 +++- arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi | 135 ++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 24 +-- .../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 171 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 126 --------------- arch/arm64/boot/dts/qcom/sc7280.dtsi | 95 +++++++++++- 6 files changed, 427 insertions(+), 154 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi