| Message ID | 20220614153306.29339-1-quic_tdas@quicinc.com |
|---|---|
| Headers | show |
| Series | Add support for audio clock gating resets for SC7280 | expand |
Quoting Taniya Das (2022-06-14 08:33:06) > The clock gating control for TX/RX/WSA core bus clocks would be required > to be reset(moved from hardware control) from audio core driver. Thus > add the support for the reset clocks. Why can't this driver remove the clks from hardware control when it probes? Does something put the clks into hardware control mode at runtime?
Quoting Taniya Das (2022-06-14 08:33:04) > Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks > for SC7280. Update reg property min/max items in YAML schema. > > Fixes: 4185b27b3bef ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280"). > Acked-by: Rob Herring <robh@kernel.org> > Signed-off-by: Taniya Das <quic_tdas@quicinc.com> > --- > .../clock/qcom,sc7280-lpasscorecc.yaml | 19 ++++++++++++++++--- > .../clock/qcom,lpassaudiocc-sc7280.h | 5 +++++ > 2 files changed, 21 insertions(+), 3 deletions(-) I'm still wondering if the binding is correct, given the overlapping reg properties. Should we be removing a compatible or two and adding a DT property like "qcom,adsp-bypass-mode" instead?
Hi Stephen, On 6/16/2022 1:25 AM, Stephen Boyd wrote: > Quoting Taniya Das (2022-06-14 08:33:06) >> The clock gating control for TX/RX/WSA core bus clocks would be required >> to be reset(moved from hardware control) from audio core driver. Thus >> add the support for the reset clocks. > > Why can't this driver remove the clks from hardware control when it > probes? Does something put the clks into hardware control mode at > runtime? Sorry for the delayed response. These bits needs to be updated at runtime and this is as per the design requirement. Thus we had to come up with reset support for the same.
Hi Stephen, On 6/16/2022 1:29 AM, Stephen Boyd wrote: > Quoting Taniya Das (2022-06-14 08:33:04) >> Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks >> for SC7280. Update reg property min/max items in YAML schema. >> >> Fixes: 4185b27b3bef ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280"). >> Acked-by: Rob Herring <robh@kernel.org> >> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> >> --- >> .../clock/qcom,sc7280-lpasscorecc.yaml | 19 ++++++++++++++++--- >> .../clock/qcom,lpassaudiocc-sc7280.h | 5 +++++ >> 2 files changed, 21 insertions(+), 3 deletions(-) > > I'm still wondering if the binding is correct, given the overlapping reg > properties. Should we be removing a compatible or two and adding a DT > property like "qcom,adsp-bypass-mode" instead? I can pick this up as cleanup and send it across for review. If you are fine now please help pick these up.
Add support for clock gating resets for lpass audio clock controller and also add support for external MCLKs for I2S. [v5] * Fix the fail path and add pm_runtime_disable(). [v4] * Fix the "fixes" tag. [v3] * Remove the maxItems from reg property. [v2] * Update/fix the YAML for reg property against each compatible. [v1] * Add support for clock gating resets for lpass audio clock controller & MCLKs. *** BLURB HERE *** Taniya Das (3): dt-bindings: clock: Add resets for LPASS audio clock controller for SC7280 dt-bindings: clock: Add support for external MCLKs for LPASS on SC7280 clk: qcom: lpass: Add support for resets & external mclk for SC7280 .../clock/qcom,sc7280-lpasscorecc.yaml | 19 +++++++++-- drivers/clk/qcom/lpassaudiocc-sc7280.c | 22 ++++++++++++- drivers/clk/qcom/lpasscorecc-sc7280.c | 33 +++++++++++++++++++ .../clock/qcom,lpassaudiocc-sc7280.h | 5 +++ .../clock/qcom,lpasscorecc-sc7280.h | 2 ++ 5 files changed, 77 insertions(+), 4 deletions(-) -- 2.17.1