[00/16] clk: qcom: smd-rpm: drop platform names

Message ID	20221203175808.859067-1-dmitry.baryshkov@linaro.org
Headers	show Return-Path: <linux-arm-msm-owner@kernel.org> From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Taniya Das <quic_tdas@quicinc.com> Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, Alex Elder <elder@linaro.org> Subject: [PATCH 00/16] clk: qcom: smd-rpm: drop platform names Date: Sat, 3 Dec 2022 19:57:52 +0200 Message-Id: <20221203175808.859067-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	clk: qcom: smd-rpm: drop platform names \| expand [00/16] clk: qcom: smd-rpm: drop platform names [01/16] clk: qcom: smd-rpm: remove duplication between sm6375 and sm6125 clocks [02/16] clk: qcom: smd-rpm: enable pin-controlled ln_bb_clk clocks on qcs404 [03/16] clk: qcom: smd-rpm: remove duplication between qcs404 and qcm2290 clocks [04/16] clk: qcom: smd-rpm: add missing ln_bb_clkN clocks [05/16] clk: qcom: smd-rpm: use msm8998_ln_bb_clk2 for qcm2290 SoC [06/16] clk: qcom: smd-rpm: rename msm8992_ln_bb_* clocks to qcs404_ln_bb_* [07/16] clk: qcom: smd-rpm: add XO_BUFFER clock for each XO_BUFFER_PINCTRL clock [08/16] clk: qcom: smd-rpm: drop the rpm_status_id field [09/16] clk: qcom: smd-rpm: move clock definitions together [10/16] clk: qcom: smd-rpm: rename some msm8974 active-only clocks [11/16] clk: qcom: smd-rpm: simplify XO_BUFFER clocks definitions [12/16] clk: qcom: smd-rpm: simplify SMD_RPM/_BRANCH/_QDSS clock definitions [13/16] clk: qcom: smd-rpm: rename SMD_RPM_BRANCH clock symbols [14/16] clk: qcom: smd-rpm: rename the qcm2290 rf_clk3 clocks [15/16] clk: qcom: smd-rpm: rename SMD_RPM_BUS clocks [16/16] clk: qcom: smd-rpm: remove usage of platform name

Dmitry Baryshkov Dec. 3, 2022, 5:57 p.m. UTC

This series concludes the previous work on Qualcomm RPM and RPMH clock
drivers. It reworks the clk-smd-rpm driver to drop the SoC name from the
clock symbol name, as the clock definitions are shared between different
SoCs (platforms). Having an SoC name in the clock definition can lead to
all sources of confusion and/or errors.

Dmitry Baryshkov (16):
  clk: qcom: smd-rpm: remove duplication between sm6375 and sm6125
    clocks
  clk: qcom: smd-rpm: enable pin-controlled ln_bb_clk clocks on qcs404
  clk: qcom: smd-rpm: remove duplication between qcs404 and qcm2290
    clocks
  clk: qcom: smd-rpm: add missing ln_bb_clkN clocks
  clk: qcom: smd-rpm: use msm8998_ln_bb_clk2 for qcm2290 SoC
  clk: qcom: smd-rpm: rename msm8992_ln_bb_* clocks to qcs404_ln_bb_*
  clk: qcom: smd-rpm: add XO_BUFFER clock for each XO_BUFFER_PINCTRL
    clock
  clk: qcom: smd-rpm: drop the rpm_status_id field
  clk: qcom: smd-rpm: move clock definitions together
  clk: qcom: smd-rpm: rename some msm8974 active-only clocks
  clk: qcom: smd-rpm: simplify XO_BUFFER clocks definitions
  clk: qcom: smd-rpm: simplify SMD_RPM/_BRANCH/_QDSS clock definitions
  clk: qcom: smd-rpm: rename SMD_RPM_BRANCH clock symbols
  clk: qcom: smd-rpm: rename the qcm2290 rf_clk3 clocks
  clk: qcom: smd-rpm: rename SMD_RPM_BUS clocks
  clk: qcom: smd-rpm: remove usage of platform name

 drivers/clk/qcom/clk-smd-rpm.c         | 1393 ++++++++++++------------
 include/dt-bindings/clock/qcom,rpmcc.h |    2 +
 include/linux/soc/qcom/smd-rpm.h       |    1 -
 3 files changed, 693 insertions(+), 703 deletions(-)

Konrad Dybcio Dec. 5, 2022, 11:13 a.m. UTC | #1

On 03/12/2022 18:57, Dmitry Baryshkov wrote:
> Reuse sm6125's MMAXI clocks for sm6375. Also drop QCOM_SMD_RPM_MMXI_CLK,
> which is equal to QCOM_SMD_RPM_MMAXI_CLK.
> 
> Fixes: 644c42295592 ("clk: qcom: smd: Add SM6375 clocks")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Nice catch!

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>   drivers/clk/qcom/clk-smd-rpm.c   | 10 ++++------
>   include/linux/soc/qcom/smd-rpm.h |  1 -
>   2 files changed, 4 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index fea505876855..077875cf0d80 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -1120,8 +1120,6 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6115 = {
>   };
>   
>   /* SM6375 */
> -DEFINE_CLK_SMD_RPM(sm6375, mmnrt_clk, mmnrt_a_clk, QCOM_SMD_RPM_MMXI_CLK, 0);
> -DEFINE_CLK_SMD_RPM(sm6375, mmrt_clk, mmrt_a_clk, QCOM_SMD_RPM_MMXI_CLK, 1);
>   DEFINE_CLK_SMD_RPM(qcm2290, hwkm_clk, hwkm_a_clk, QCOM_SMD_RPM_HWKM_CLK, 0);
>   DEFINE_CLK_SMD_RPM(qcm2290, pka_clk, pka_a_clk, QCOM_SMD_RPM_PKA_CLK, 0);
>   DEFINE_CLK_SMD_RPM_BRANCH(sm6375, bimc_freq_log, bimc_freq_log_a, QCOM_SMD_RPM_MISC_CLK, 4, 1);
> @@ -1140,10 +1138,10 @@ static struct clk_smd_rpm *sm6375_clks[] = {
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
>   	[RPM_SMD_QUP_A_CLK] = &sm6125_qup_a_clk,
> -	[RPM_SMD_MMRT_CLK] = &sm6375_mmrt_clk,
> -	[RPM_SMD_MMRT_A_CLK] = &sm6375_mmrt_a_clk,
> -	[RPM_SMD_MMNRT_CLK] = &sm6375_mmnrt_clk,
> -	[RPM_SMD_MMNRT_A_CLK] = &sm6375_mmnrt_a_clk,
> +	[RPM_SMD_MMRT_CLK] = &sm6125_mmrt_clk,
> +	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
> +	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
> +	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
>   	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
>   	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
>   	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
> diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h
> index 3ab8c07f71c0..82c9d489833a 100644
> --- a/include/linux/soc/qcom/smd-rpm.h
> +++ b/include/linux/soc/qcom/smd-rpm.h
> @@ -41,7 +41,6 @@ struct qcom_smd_rpm;
>   #define QCOM_SMD_RPM_HWKM_CLK	0x6d6b7768
>   #define QCOM_SMD_RPM_PKA_CLK	0x616b70
>   #define QCOM_SMD_RPM_MCFG_CLK	0x6766636d
> -#define QCOM_SMD_RPM_MMXI_CLK	0x69786d6d
>   
>   int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm,
>   		       int state,

Konrad Dybcio Dec. 5, 2022, 11:15 a.m. UTC | #2

On 03/12/2022 18:57, Dmitry Baryshkov wrote:
> Reuse qcs404's QPIC and BIMC_GPU clock for qcm2290.
> 
> Fixes: 78b727d02815 ("clk: qcom: smd-rpm: Add QCM2290 RPM clock support")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>   drivers/clk/qcom/clk-smd-rpm.c | 9 ++++-----
>   1 file changed, 4 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 877ffda42ee9..26c4738eaacf 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -1166,7 +1166,6 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6375 = {
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, ln_bb_clk2, ln_bb_clk2_a, 0x2, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, rf_clk3_a, 6, 38400000);
>   
> -DEFINE_CLK_SMD_RPM(qcm2290, qpic_clk, qpic_a_clk, QCOM_SMD_RPM_QPIC_CLK, 0);
>   DEFINE_CLK_SMD_RPM(qcm2290, cpuss_gnoc_clk, cpuss_gnoc_a_clk,
>   		   QCOM_SMD_RPM_MEM_CLK, 1);
>   DEFINE_CLK_SMD_RPM(qcm2290, bimc_gpu_clk, bimc_gpu_a_clk,
> @@ -1201,14 +1200,14 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
>   	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
> -	[RPM_SMD_QPIC_CLK] = &qcm2290_qpic_clk,
> -	[RPM_SMD_QPIC_CLK_A] = &qcm2290_qpic_a_clk,
> +	[RPM_SMD_QPIC_CLK] = &qcs404_qpic_clk,
> +	[RPM_SMD_QPIC_CLK_A] = &qcs404_qpic_a_clk,
>   	[RPM_SMD_HWKM_CLK] = &qcm2290_hwkm_clk,
>   	[RPM_SMD_HWKM_A_CLK] = &qcm2290_hwkm_a_clk,
>   	[RPM_SMD_PKA_CLK] = &qcm2290_pka_clk,
>   	[RPM_SMD_PKA_A_CLK] = &qcm2290_pka_a_clk,
> -	[RPM_SMD_BIMC_GPU_CLK] = &qcm2290_bimc_gpu_clk,
> -	[RPM_SMD_BIMC_GPU_A_CLK] = &qcm2290_bimc_gpu_a_clk,
> +	[RPM_SMD_BIMC_GPU_CLK] = &qcs404_bimc_gpu_clk,
> +	[RPM_SMD_BIMC_GPU_A_CLK] = &qcs404_bimc_gpu_a_clk,
>   	[RPM_SMD_CPUSS_GNOC_CLK] = &qcm2290_cpuss_gnoc_clk,
>   	[RPM_SMD_CPUSS_GNOC_A_CLK] = &qcm2290_cpuss_gnoc_a_clk,
>   };

Konrad Dybcio Dec. 5, 2022, 11:18 a.m. UTC | #3

On 03/12/2022 18:57, Dmitry Baryshkov wrote:
> The qcm2290's ln_bb_clk2 is identical to the freshly added msm8998's
> ln_bb_clk2 one. Use the latter and drop the SoC-specific version.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>   drivers/clk/qcom/clk-smd-rpm.c | 5 ++---
>   1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 42d55bf35a33..6af0753454ea 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -1167,7 +1167,6 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6375 = {
>   };
>   
>   /* QCM2290 */
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, ln_bb_clk2, ln_bb_clk2_a, 0x2, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, rf_clk3_a, 6, 38400000);
>   
>   DEFINE_CLK_SMD_RPM(qcm2290, cpuss_gnoc_clk, cpuss_gnoc_a_clk,
> @@ -1184,8 +1183,8 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &sm6125_qdss_clk,
>   	[RPM_SMD_QDSS_A_CLK] = &sm6125_qdss_a_clk,
> -	[RPM_SMD_LN_BB_CLK2] = &qcm2290_ln_bb_clk2,
> -	[RPM_SMD_LN_BB_CLK2_A] = &qcm2290_ln_bb_clk2_a,
> +	[RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2,
> +	[RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
>   	[RPM_SMD_RF_CLK3] = &qcm2290_rf_clk3,
>   	[RPM_SMD_RF_CLK3_A] = &qcm2290_rf_clk3_a,
>   	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,

Konrad Dybcio Dec. 5, 2022, 11:20 a.m. UTC | #4

On 03/12/2022 18:57, Dmitry Baryshkov wrote:
> For each XO_BUFFER_PINCTRL there is a corresponding XO_BUFFER clock.
> Add them automatically to drop the duplication between the clock
> definitions.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>   drivers/clk/qcom/clk-smd-rpm.c | 47 +++++++++++++---------------------
>   1 file changed, 18 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 3a526a231684..e52e0e242294 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -124,7 +124,10 @@
>   
>   #define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name, _active,	      \
>   					     r_id, r)			      \
> -		__DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active,	      \
> +		DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, _active,	      \
> +					     r_id, r);			      \
> +		__DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name##_pin,	      \
> +		_active##_pin,						      \
>   		QCOM_SMD_RPM_CLK_BUF_A, r_id, 0, r,			      \
>   		QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY)
>   
> @@ -419,14 +422,10 @@ DEFINE_CLK_SMD_RPM(msm8916, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
>   DEFINE_CLK_SMD_RPM(msm8916, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0);
>   DEFINE_CLK_SMD_RPM(qcs404, qpic_clk, qpic_a_clk, QCOM_SMD_RPM_QPIC_CLK, 0);
>   DEFINE_CLK_SMD_RPM_QDSS(msm8916, qdss_clk, qdss_a_clk, QCOM_SMD_RPM_MISC_CLK, 1);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8916, bb_clk1, bb_clk1_a, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8916, bb_clk2, bb_clk2_a, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8916, rf_clk1, rf_clk1_a, 4, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8916, rf_clk2, rf_clk2_a, 5, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk1_pin, bb_clk1_a_pin, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk2_pin, bb_clk2_a_pin, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk1_pin, rf_clk1_a_pin, 4, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2_pin, rf_clk2_a_pin, 5, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk1, bb_clk1_a, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk2, bb_clk2_a, 2, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk1, rf_clk1_a, 4, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2, rf_clk2_a, 5, 19200000);
>   
>   static struct clk_smd_rpm *msm8909_clks[] = {
>   	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
> @@ -534,19 +533,14 @@ DEFINE_CLK_SMD_RPM(msm8974, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
>   DEFINE_CLK_SMD_RPM(msm8974, mmssnoc_ahb_clk, mmssnoc_ahb_a_clk, QCOM_SMD_RPM_BUS_CLK, 3);
>   DEFINE_CLK_SMD_RPM(msm8974, gfx3d_clk_src, gfx3d_a_clk_src, QCOM_SMD_RPM_MEM_CLK, 1);
>   DEFINE_CLK_SMD_RPM(msm8974, ocmemgx_clk, ocmemgx_a_clk, QCOM_SMD_RPM_MEM_CLK, 2);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, cxo_d0, cxo_d0_a, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, cxo_d1, cxo_d1_a, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, cxo_a0, cxo_a0_a, 4, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, cxo_a1, cxo_a1_a, 5, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, cxo_a2, cxo_a2_a, 6, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_a_clk, 7, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_a_clk1, 11, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_a_clk2, 12, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0_pin, cxo_d0_a_pin, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1_pin, cxo_d1_a_pin, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0_pin, cxo_a0_a_pin, 4, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1_pin, cxo_a1_a_pin, 5, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2_pin, cxo_a2_a_pin, 6, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0, cxo_d0_a, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1, cxo_d1_a, 2, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0, cxo_a0_a, 4, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1, cxo_a1_a, 5, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2, cxo_a2_a, 6, 19200000);
>   
>   static struct clk_smd_rpm *msm8974_clks[] = {
>   	[RPM_SMD_PNOC_CLK]		= &msm8916_pcnoc_clk,
> @@ -635,8 +629,7 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8976 = {
>   };
>   
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, div_clk3_a, 13, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(qcs404, ln_bb_clk, ln_bb_clk_a, 8, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk_pin, ln_bb_clk_a_pin, 8, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk, ln_bb_clk_a, 8, 19200000);
>   
>   DEFINE_CLK_SMD_RPM(msm8992, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0);
>   DEFINE_CLK_SMD_RPM(msm8992, ce2_clk, ce2_a_clk, QCOM_SMD_RPM_CE_CLK, 1);
> @@ -852,18 +845,14 @@ static const struct rpm_smd_clk_desc rpm_clk_qcs404 = {
>   	.num_clks = ARRAY_SIZE(qcs404_clks),
>   };
>   
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk1, ln_bb_clk1_a, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk1_pin, ln_bb_clk1_a_pin, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk2, ln_bb_clk2_a, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk2_pin, ln_bb_clk2_a_pin, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3_pin, ln_bb_clk3_a_pin, 3, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk1, ln_bb_clk1_a, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk2, ln_bb_clk2_a, 2, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000);
>   DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc_clk, aggre1_noc_a_clk,
>   		   QCOM_SMD_RPM_AGGR_CLK, 1);
>   DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc_clk, aggre2_noc_a_clk,
>   		   QCOM_SMD_RPM_AGGR_CLK, 2);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk3, rf_clk3_a, 6, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3_pin, rf_clk3_a_pin, 6, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3, rf_clk3_a, 6, 19200000);
>   
>   static struct clk_smd_rpm *msm8998_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo,

Konrad Dybcio Dec. 5, 2022, 11:25 a.m. UTC | #5

On 03/12/2022 18:58, Dmitry Baryshkov wrote:
> Rename msm8974_diff_a_clk, msm8974_div_a_clk1 and msm8974_div_a_clk2 to
> move the _a suffix to the end of the name. This follows the patter used
> by other active-only clocks and thus makes it possible to simplify clock
> definitions.
> This changes the userspace-visible names for this clocks.
Hopefully this won't break NASA's Mars drone ;)

More seriously, I don't see a usecase where any of these clocks would be
controlled from userspace, not with the mainline kernel at least - we 
never know what crazy vendors do downstream..

> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>   drivers/clk/qcom/clk-smd-rpm.c | 34 +++++++++++++++++-----------------
>   1 file changed, 17 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 761a5b0b4b94..cb47d69889fb 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -474,9 +474,9 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0, cxo_a0_a, 4, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1, cxo_a1_a, 5, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2, cxo_a2_a, 6, 19200000);
>   
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_a_clk, 7, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_a_clk1, 11, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_a_clk2, 12, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_clk_a, 7, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_clk1_a, 11, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_clk2_a, 12, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, div_clk3_a, 13, 19200000);
>   
>   static struct clk_smd_rpm *msm8909_clks[] = {
> @@ -607,11 +607,11 @@ static struct clk_smd_rpm *msm8974_clks[] = {
>   	[RPM_SMD_CXO_A2]		= &msm8974_cxo_a2,
>   	[RPM_SMD_CXO_A2_A]		= &msm8974_cxo_a2_a,
>   	[RPM_SMD_DIFF_CLK]		= &msm8974_diff_clk,
> -	[RPM_SMD_DIFF_A_CLK]		= &msm8974_diff_a_clk,
> +	[RPM_SMD_DIFF_A_CLK]		= &msm8974_diff_clk_a,
>   	[RPM_SMD_DIV_CLK1]		= &msm8974_div_clk1,
> -	[RPM_SMD_DIV_A_CLK1]		= &msm8974_div_a_clk1,
> +	[RPM_SMD_DIV_A_CLK1]		= &msm8974_div_clk1_a,
>   	[RPM_SMD_DIV_CLK2]		= &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2]		= &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2]		= &msm8974_div_clk2_a,
>   	[RPM_SMD_CXO_D0_PIN]		= &msm8974_cxo_d0_pin,
>   	[RPM_SMD_CXO_D0_A_PIN]		= &msm8974_cxo_d0_a_pin,
>   	[RPM_SMD_CXO_D1_PIN]		= &msm8974_cxo_d1_pin,
> @@ -653,7 +653,7 @@ static struct clk_smd_rpm *msm8976_clks[] = {
>   	[RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin,
>   	[RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin,
>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   };
> @@ -687,9 +687,9 @@ static struct clk_smd_rpm *msm8992_clks[] = {
>   	[RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin,
>   	[RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin,
>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>   	[RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
>   	[RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
> @@ -745,9 +745,9 @@ static struct clk_smd_rpm *msm8994_clks[] = {
>   	[RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin,
>   	[RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin,
>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>   	[RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
>   	[RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
> @@ -813,9 +813,9 @@ static struct clk_smd_rpm *msm8996_clks[] = {
>   	[RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>   	[RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>   	[RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
>   	[RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>   	[RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin,
> @@ -875,9 +875,9 @@ static struct clk_smd_rpm *msm8998_clks[] = {
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>   	[RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
>   	[RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
> @@ -945,7 +945,7 @@ static struct clk_smd_rpm *sdm660_clks[] = {
>   	[RPM_SMD_RF_CLK1] = &msm8916_rf_clk1,
>   	[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>   	[RPM_SMD_LN_BB_CLK] = &msm8998_ln_bb_clk1,
>   	[RPM_SMD_LN_BB_A_CLK] = &msm8998_ln_bb_clk1_a,
>   	[RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2,
> @@ -1013,7 +1013,7 @@ static struct clk_smd_rpm *msm8953_clks[] = {
>   	[RPM_SMD_RF_CLK3]		= &qcs404_ln_bb_clk,
>   	[RPM_SMD_RF_CLK3_A]		= &qcs404_ln_bb_clk_a,
>   	[RPM_SMD_DIV_CLK2]		= &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2]		= &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2]		= &msm8974_div_clk2_a,
>   	[RPM_SMD_BB_CLK1_PIN]		= &msm8916_bb_clk1_pin,
>   	[RPM_SMD_BB_CLK1_A_PIN]		= &msm8916_bb_clk1_a_pin,
>   	[RPM_SMD_BB_CLK2_PIN]		= &msm8916_bb_clk2_pin,

Konrad Dybcio Dec. 5, 2022, 11:27 a.m. UTC | #6

On 03/12/2022 18:58, Dmitry Baryshkov wrote:
> Remove the duplication between the names of the normal and active-only
> XO_BUFFER and XO_BUFFER_PINCTRL clocks by using preprocessor logic to
> add _a suffix.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>   drivers/clk/qcom/clk-smd-rpm.c | 54 +++++++++++++++++-----------------
>   1 file changed, 27 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index cb47d69889fb..9f33dbd60e96 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -112,17 +112,17 @@
>   		__DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id,   \
>   		QCOM_RPM_SMD_KEY_STATE)
>   
> -#define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, _active, r_id, r)      \
> -		__DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active,	      \
> +#define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, r_id, r)		      \
> +		__DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _name##_a,      \
>   		QCOM_SMD_RPM_CLK_BUF_A, r_id, r,			      \
>   		QCOM_RPM_KEY_SOFTWARE_ENABLE)
>   
> -#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name, _active,	      \
> +#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name,		      \
>   					     r_id, r)			      \
> -		DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, _active,	      \
> +		DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name,		      \
>   					     r_id, r);			      \
>   		__DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name##_pin,	      \
> -		_active##_pin,						      \
> +		_name##_a##_pin,					      \
>   		QCOM_SMD_RPM_CLK_BUF_A, r_id, r,			      \
>   		QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY)
>   
> @@ -456,28 +456,28 @@ DEFINE_CLK_SMD_RPM(qcs404, qpic_clk, qpic_a_clk, QCOM_SMD_RPM_QPIC_CLK, 0);
>   
>   DEFINE_CLK_SMD_RPM(sm6125, qup_clk, qup_a_clk, QCOM_SMD_RPM_QUP_CLK, 0);
>   
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk1, bb_clk1_a, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk2, bb_clk2_a, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk1, ln_bb_clk1_a, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk2, ln_bb_clk2_a, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk1, rf_clk1_a, 4, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2, rf_clk2_a, 5, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3, rf_clk3_a, 6, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk, ln_bb_clk_a, 8, 19200000);
> -
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, rf_clk3_a, 6, 38400000);
> -
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0, cxo_d0_a, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1, cxo_d1_a, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0, cxo_a0_a, 4, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1, cxo_a1_a, 5, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2, cxo_a2_a, 6, 19200000);
> -
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_clk_a, 7, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_clk1_a, 11, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_clk2_a, 12, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, div_clk3_a, 13, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk1, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk2, 2, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk1, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk2, 2, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3, 3, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk1, 4, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2, 5, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3, 6, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk, 8, 19200000);
> +
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, 6, 38400000);
> +
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1, 2, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0, 4, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1, 5, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2, 6, 19200000);
> +
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, 7, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, 11, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, 12, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, 13, 19200000);
>   
>   static struct clk_smd_rpm *msm8909_clks[] = {
>   	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,

Konrad Dybcio Dec. 5, 2022, 11:31 a.m. UTC | #7

On 03/12/2022 18:58, Dmitry Baryshkov wrote:
> Rename the qcm2290_rf_clk3 clocks adding 38m4 prefix to distinguish it
> form the common (19.2 MHz) rf_clk3. The system (and userspace) name of
> these clocks remains intact.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>   drivers/clk/qcom/clk-smd-rpm.c | 11 ++++++++---
>   1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 8dcaa63b0623..f407acb3c6d3 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -125,6 +125,11 @@
>   		QCOM_SMD_RPM_CLK_BUF_A, r_id, r,			      \
>   		QCOM_RPM_KEY_SOFTWARE_ENABLE)
>   
> +#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PREFIX(_platform, _prefix, _name, r_id, r)	      \
> +		__DEFINE_CLK_SMD_RPM_BRANCH(_platform, _prefix, _name, _name##_a,    \
> +		QCOM_SMD_RPM_CLK_BUF_A, r_id, r,			      \
> +		QCOM_RPM_KEY_SOFTWARE_ENABLE)
> +
>   #define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name,		      \
>   					     r_id, r)			      \
>   		DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name,		      \
> @@ -474,7 +479,7 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2, 5, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3, 6, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk, 8, 19200000);
>   
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, 6, 38400000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PREFIX(qcm2290, 38m4_, rf_clk3, 6, 38400000);
>   
>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0, 1, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1, 2, 19200000);
> @@ -1164,8 +1169,8 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
>   	[RPM_SMD_QDSS_A_CLK] = &sm6125_branch_qdss_a_clk,
>   	[RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2,
>   	[RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
> -	[RPM_SMD_RF_CLK3] = &qcm2290_rf_clk3,
> -	[RPM_SMD_RF_CLK3_A] = &qcm2290_rf_clk3_a,
> +	[RPM_SMD_RF_CLK3] = &qcm2290_38m4_rf_clk3,
> +	[RPM_SMD_RF_CLK3_A] = &qcm2290_38m4_rf_clk3_a,
>   	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
>   	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,

Konrad Dybcio Dec. 5, 2022, 11:34 a.m. UTC | #8

On 03/12/2022 18:58, Dmitry Baryshkov wrote:
> Add special macro for the clocks of QCOM_SMD_RPM_BUS_CLK type. Use it to
> insert the _bus_N part into the clock symbol name. The system (and
> userspace) name of these clocks remains intact.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>   drivers/clk/qcom/clk-smd-rpm.c | 253 +++++++++++++++++----------------
>   1 file changed, 129 insertions(+), 124 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index f407acb3c6d3..b37e5d883a10 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -25,13 +25,13 @@
>   #define QCOM_RPM_SMD_KEY_STATE				0x54415453
>   #define QCOM_RPM_SCALING_ENABLE_ID			0x2
>   
> -#define __DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id, key)      \
> -	static struct clk_smd_rpm _platform##_##_active;		      \
> -	static struct clk_smd_rpm _platform##_##_name = {		      \
> +#define __DEFINE_CLK_SMD_RPM(_platform, _prefix, _name, _active, type, r_id, key)      \
> +	static struct clk_smd_rpm _platform##_##_prefix##_active;	      \
> +	static struct clk_smd_rpm _platform##_##_prefix##_name = {	      \
>   		.rpm_res_type = (type),					      \
>   		.rpm_clk_id = (r_id),					      \
>   		.rpm_key = (key),					      \
> -		.peer = &_platform##_##_active,				      \
> +		.peer = &_platform##_##_prefix##_active,		      \
>   		.rate = INT_MAX,					      \
>   		.hw.init = &(struct clk_init_data){			      \
>   			.ops = &clk_smd_rpm_ops,			      \
> @@ -43,12 +43,12 @@
>   			.num_parents = 1,				      \
>   		},							      \
>   	};								      \
> -	static struct clk_smd_rpm _platform##_##_active = {		      \
> +	static struct clk_smd_rpm _platform##_##_prefix##_active = {	      \
>   		.rpm_res_type = (type),					      \
>   		.rpm_clk_id = (r_id),					      \
>   		.active_only = true,					      \
>   		.rpm_key = (key),					      \
> -		.peer = &_platform##_##_name,				      \
> +		.peer = &_platform##_##_prefix##_name,			      \
>   		.rate = INT_MAX,					      \
>   		.hw.init = &(struct clk_init_data){			      \
>   			.ops = &clk_smd_rpm_ops,			      \
> @@ -101,11 +101,16 @@
>   	}
>   
>   #define DEFINE_CLK_SMD_RPM(_platform, _name, type, r_id)		      \
> -		__DEFINE_CLK_SMD_RPM(_platform, _name##_clk, _name##_a_clk, type, r_id,   \
> +		__DEFINE_CLK_SMD_RPM(_platform, , _name##_clk, _name##_a_clk, type, r_id,   \
> +		QCOM_RPM_SMD_KEY_RATE)
> +
> +#define DEFINE_CLK_SMD_RPM_BUS(_platform, _name, r_id)			      \
> +		__DEFINE_CLK_SMD_RPM(_platform, bus_##r_id##_,		      \
> +		_name##_clk, _name##_a_clk, QCOM_SMD_RPM_BUS_CLK, r_id,	      \
>   		QCOM_RPM_SMD_KEY_RATE)
>   
>   #define DEFINE_CLK_SMD_RPM_CLK_SRC(_platform, _name, type, r_id)	      \
> -		__DEFINE_CLK_SMD_RPM(_platform, _name##_clk_src, _name##_a_clk_src, type, r_id,   \
> +		__DEFINE_CLK_SMD_RPM(_platform, , _name##_clk_src, _name##_a_clk_src, type, r_id,   \
>   		QCOM_RPM_SMD_KEY_RATE)
>   
>   #define DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, type, r_id, r)	      \
> @@ -117,7 +122,7 @@
>   		r_id, r, QCOM_RPM_SMD_KEY_ENABLE)
>   
>   #define DEFINE_CLK_SMD_RPM_QDSS(_platform, _name, type, r_id)		      \
> -		__DEFINE_CLK_SMD_RPM(_platform, _name##_clk, _name##_a_clk, type, r_id,   \
> +		__DEFINE_CLK_SMD_RPM(_platform, , _name##_clk, _name##_a_clk, type, r_id,   \
>   		QCOM_RPM_SMD_KEY_STATE)
>   
>   #define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, r_id, r)		      \
> @@ -435,15 +440,15 @@ DEFINE_CLK_SMD_RPM_BRANCH(msm8996, aggre2_noc, QCOM_SMD_RPM_AGGR_CLK, 2, 1000);
>   DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc, QCOM_SMD_RPM_AGGR_CLK, 1);
>   DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc, QCOM_SMD_RPM_AGGR_CLK, 2);
>   
> -DEFINE_CLK_SMD_RPM(msm8916, pcnoc, QCOM_SMD_RPM_BUS_CLK, 0);
> -DEFINE_CLK_SMD_RPM(msm8916, snoc, QCOM_SMD_RPM_BUS_CLK, 1);
> -DEFINE_CLK_SMD_RPM(msm8936, sysmmnoc, QCOM_SMD_RPM_BUS_CLK, 2);
> -DEFINE_CLK_SMD_RPM(msm8974, cnoc, QCOM_SMD_RPM_BUS_CLK, 2);
> -DEFINE_CLK_SMD_RPM(msm8974, mmssnoc_ahb, QCOM_SMD_RPM_BUS_CLK, 3);
> -DEFINE_CLK_SMD_RPM(sm6125, snoc_periph, QCOM_SMD_RPM_BUS_CLK, 0);
> -DEFINE_CLK_SMD_RPM(sm6125, cnoc, QCOM_SMD_RPM_BUS_CLK, 1);
> -DEFINE_CLK_SMD_RPM(sm6125, snoc, QCOM_SMD_RPM_BUS_CLK, 2);
> -DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass, QCOM_SMD_RPM_BUS_CLK, 5);
> +DEFINE_CLK_SMD_RPM_BUS(msm8916, pcnoc, 0);
> +DEFINE_CLK_SMD_RPM_BUS(msm8916, snoc, 1);
> +DEFINE_CLK_SMD_RPM_BUS(msm8936, sysmmnoc, 2);
> +DEFINE_CLK_SMD_RPM_BUS(msm8974, cnoc, 2);
> +DEFINE_CLK_SMD_RPM_BUS(msm8974, mmssnoc_ahb, 3);
> +DEFINE_CLK_SMD_RPM_BUS(sm6125, snoc_periph, 0);
> +DEFINE_CLK_SMD_RPM_BUS(sm6125, cnoc, 1);
> +DEFINE_CLK_SMD_RPM_BUS(sm6125, snoc, 2);
> +DEFINE_CLK_SMD_RPM_BUS(sm6125, snoc_lpass, 5);
>   
>   DEFINE_CLK_SMD_RPM(msm8916, bimc, QCOM_SMD_RPM_MEM_CLK, 0);
>   DEFINE_CLK_SMD_RPM(qcm2290, cpuss_gnoc, QCOM_SMD_RPM_MEM_CLK, 1);
> @@ -493,10 +498,10 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, 12, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, 13, 19200000);
>   
>   static struct clk_smd_rpm *msm8909_clks[] = {
> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>   	[RPM_SMD_QPIC_CLK]		= &qcs404_qpic_clk,
> @@ -527,10 +532,10 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8909 = {
>   };
>   
>   static struct clk_smd_rpm *msm8916_clks[] = {
> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>   	[RPM_SMD_QDSS_CLK]		= &msm8916_qdss_clk,
> @@ -559,14 +564,14 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8916 = {
>   };
>   
>   static struct clk_smd_rpm *msm8936_clks[] = {
> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
> -	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_sysmmnoc_clk,
> -	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_sysmmnoc_a_clk,
> +	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_bus_2_sysmmnoc_clk,
> +	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_bus_2_sysmmnoc_a_clk,
>   	[RPM_SMD_QDSS_CLK]		= &msm8916_qdss_clk,
>   	[RPM_SMD_QDSS_A_CLK]		= &msm8916_qdss_a_clk,
>   	[RPM_SMD_BB_CLK1]		= &msm8916_bb_clk1,
> @@ -593,14 +598,14 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8936 = {
>   };
>   
>   static struct clk_smd_rpm *msm8974_clks[] = {
> -	[RPM_SMD_PNOC_CLK]		= &msm8916_pcnoc_clk,
> -	[RPM_SMD_PNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
> -	[RPM_SMD_CNOC_CLK]		= &msm8974_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK]		= &msm8974_cnoc_a_clk,
> -	[RPM_SMD_MMSSNOC_AHB_CLK]	= &msm8974_mmssnoc_ahb_clk,
> -	[RPM_SMD_MMSSNOC_AHB_A_CLK]	= &msm8974_mmssnoc_ahb_a_clk,
> +	[RPM_SMD_PNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
> +	[RPM_SMD_CNOC_CLK]		= &msm8974_bus_2_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK]		= &msm8974_bus_2_cnoc_a_clk,
> +	[RPM_SMD_MMSSNOC_AHB_CLK]	= &msm8974_bus_3_mmssnoc_ahb_clk,
> +	[RPM_SMD_MMSSNOC_AHB_A_CLK]	= &msm8974_bus_3_mmssnoc_ahb_a_clk,
>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>   	[RPM_SMD_GFX3D_CLK_SRC]		= &msm8974_gfx3d_clk_src,
>   	[RPM_SMD_GFX3D_A_CLK_SRC]	= &msm8974_gfx3d_a_clk_src,
> @@ -645,14 +650,14 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8974 = {
>   static struct clk_smd_rpm *msm8976_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
> -	[RPM_SMD_SYSMMNOC_CLK]	= &msm8936_sysmmnoc_clk,
> -	[RPM_SMD_SYSMMNOC_A_CLK] = &msm8936_sysmmnoc_a_clk,
> +	[RPM_SMD_SYSMMNOC_CLK]	= &msm8936_bus_2_sysmmnoc_clk,
> +	[RPM_SMD_SYSMMNOC_A_CLK] = &msm8936_bus_2_sysmmnoc_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
>   	[RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk,
>   	[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
> @@ -679,18 +684,18 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8976 = {
>   static struct clk_smd_rpm *msm8992_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
> +	[RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>   	[RPM_SMD_OCMEMGX_CLK] = &msm8974_ocmemgx_clk,
>   	[RPM_SMD_OCMEMGX_A_CLK] = &msm8974_ocmemgx_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>   	[RPM_SMD_GFX3D_CLK_SRC] = &msm8974_gfx3d_clk_src,
>   	[RPM_SMD_GFX3D_A_CLK_SRC] = &msm8974_gfx3d_a_clk_src,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
>   	[RPM_SMD_BB_CLK1_A] = &msm8916_bb_clk1_a,
>   	[RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin,
> @@ -709,8 +714,8 @@ static struct clk_smd_rpm *msm8992_clks[] = {
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>   	[RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
> -	[RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk,
> -	[RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk,
> +	[RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_bus_3_mmssnoc_ahb_clk,
> +	[RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_bus_3_mmssnoc_ahb_a_clk,
>   	[RPM_SMD_MSS_CFG_AHB_CLK] = &msm8992_branch_mss_cfg_ahb_clk,
>   	[RPM_SMD_MSS_CFG_AHB_A_CLK] = &msm8992_branch_mss_cfg_ahb_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
> @@ -737,18 +742,18 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8992 = {
>   static struct clk_smd_rpm *msm8994_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
> +	[RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>   	[RPM_SMD_OCMEMGX_CLK] = &msm8974_ocmemgx_clk,
>   	[RPM_SMD_OCMEMGX_A_CLK] = &msm8974_ocmemgx_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>   	[RPM_SMD_GFX3D_CLK_SRC] = &msm8974_gfx3d_clk_src,
>   	[RPM_SMD_GFX3D_A_CLK_SRC] = &msm8974_gfx3d_a_clk_src,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
>   	[RPM_SMD_BB_CLK1_A] = &msm8916_bb_clk1_a,
>   	[RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin,
> @@ -767,8 +772,8 @@ static struct clk_smd_rpm *msm8994_clks[] = {
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>   	[RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
> -	[RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk,
> -	[RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk,
> +	[RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_bus_3_mmssnoc_ahb_clk,
> +	[RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_bus_3_mmssnoc_ahb_a_clk,
>   	[RPM_SMD_MSS_CFG_AHB_CLK] = &msm8992_branch_mss_cfg_ahb_clk,
>   	[RPM_SMD_MSS_CFG_AHB_A_CLK] = &msm8992_branch_mss_cfg_ahb_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
> @@ -795,12 +800,12 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8994 = {
>   };
>   
>   static struct clk_smd_rpm *msm8996_clks[] = {
> -	[RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_MMAXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk,
> @@ -849,10 +854,10 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8996 = {
>   static struct clk_smd_rpm *qcs404_clks[] = {
>   	[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
>   	[RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk,
> -	[RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> +	[RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_BIMC_GPU_CLK] = &qcs404_bimc_gpu_clk,
> @@ -879,12 +884,12 @@ static struct clk_smd_rpm *msm8998_clks[] = {
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
> -	[RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
> @@ -937,12 +942,12 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8998 = {
>   static struct clk_smd_rpm *sdm660_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
> -	[RPM_SMD_CNOC_PERIPH_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_CNOC_PERIPH_A_CLK] = &msm8916_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
> +	[RPM_SMD_CNOC_PERIPH_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_CNOC_PERIPH_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_MMSSNOC_AXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk,
> @@ -983,8 +988,8 @@ static const struct rpm_smd_clk_desc rpm_clk_sdm660 = {
>   static struct clk_smd_rpm *mdm9607_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC]		= &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC]		= &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>   	[RPM_SMD_QPIC_CLK]		= &qcs404_qpic_clk,
> @@ -1005,16 +1010,16 @@ static const struct rpm_smd_clk_desc rpm_clk_mdm9607 = {
>   static struct clk_smd_rpm *msm8953_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC]		= &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC]		= &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>   	[RPM_SMD_IPA_CLK]		= &msm8976_ipa_clk,
>   	[RPM_SMD_IPA_A_CLK]		= &msm8976_ipa_a_clk,
> -	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_sysmmnoc_clk,
> -	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_sysmmnoc_a_clk,
> +	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_bus_2_sysmmnoc_clk,
> +	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_bus_2_sysmmnoc_a_clk,
>   	[RPM_SMD_QDSS_CLK]		= &msm8916_qdss_clk,
>   	[RPM_SMD_QDSS_A_CLK]		= &msm8916_qdss_a_clk,
>   	[RPM_SMD_BB_CLK1]		= &msm8916_bb_clk1,
> @@ -1041,8 +1046,8 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8953 = {
>   static struct clk_smd_rpm *sm6125_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
> @@ -1051,8 +1056,8 @@ static struct clk_smd_rpm *sm6125_clks[] = {
>   	[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
>   	[RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,
>   	[RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,
> -	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
> @@ -1069,10 +1074,10 @@ static struct clk_smd_rpm *sm6125_clks[] = {
>   	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
>   	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
>   	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
> -	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
> -	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
> -	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
> -	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
> +	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
> +	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
> +	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
> +	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
>   };
>   
>   static const struct rpm_smd_clk_desc rpm_clk_sm6125 = {
> @@ -1084,8 +1089,8 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6125 = {
>   static struct clk_smd_rpm *sm6115_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
> @@ -1094,8 +1099,8 @@ static struct clk_smd_rpm *sm6115_clks[] = {
>   	[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
>   	[RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,
>   	[RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,
> -	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
> @@ -1106,10 +1111,10 @@ static struct clk_smd_rpm *sm6115_clks[] = {
>   	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
>   	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
>   	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
> -	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
> -	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
> -	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
> -	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
> +	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
> +	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
> +	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
> +	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
>   	[RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin,
>   	[RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin,
>   	[RPM_SMD_RF_CLK2_PIN] = &msm8916_rf_clk2_pin,
> @@ -1124,14 +1129,14 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6115 = {
>   static struct clk_smd_rpm *sm6375_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
>   	[RPM_SMD_QDSS_A_CLK] = &sm6125_branch_qdss_a_clk,
> -	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
> @@ -1140,10 +1145,10 @@ static struct clk_smd_rpm *sm6375_clks[] = {
>   	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
>   	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
>   	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
> -	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
> -	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
> -	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
> -	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
> +	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
> +	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
> +	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
> +	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>   	[RPM_SMD_HWKM_CLK] = &qcm2290_hwkm_clk,
> @@ -1161,8 +1166,8 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6375 = {
>   static struct clk_smd_rpm *qcm2290_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
> @@ -1171,8 +1176,8 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
>   	[RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
>   	[RPM_SMD_RF_CLK3] = &qcm2290_38m4_rf_clk3,
>   	[RPM_SMD_RF_CLK3_A] = &qcm2290_38m4_rf_clk3_a,
> -	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
> @@ -1181,10 +1186,10 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
>   	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
>   	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
>   	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
> -	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
> -	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
> -	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
> -	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
> +	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
> +	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
> +	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
> +	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>   	[RPM_SMD_QPIC_CLK] = &qcs404_qpic_clk,

Alex Elder Dec. 5, 2022, 5:04 p.m. UTC | #9

On 12/3/22 11:57 AM, Dmitry Baryshkov wrote:
> Reuse sm6125's MMAXI clocks for sm6375. Also drop QCOM_SMD_RPM_MMXI_CLK,
> which is equal to QCOM_SMD_RPM_MMAXI_CLK.
> 
> Fixes: 644c42295592 ("clk: qcom: smd: Add SM6375 clocks")

Was there an actual bug in the above commit?  I only ask because
the "Fixes" thing to me implies that this patch is a bug fix to
be back-ported, and I don't think that's the case here.

Perhaps the MMXI/MMAXI duplication could be considered a bug,
but if that's the case please fix that separately (first), and
then reuse the same clock for both SoCs second.

Otherwise this looks good to me.

Reviewed-by: Alex Elder <elder@linaro.org>

> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/clk/qcom/clk-smd-rpm.c   | 10 ++++------
>   include/linux/soc/qcom/smd-rpm.h |  1 -
>   2 files changed, 4 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index fea505876855..077875cf0d80 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -1120,8 +1120,6 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6115 = {
>   };
>   
>   /* SM6375 */
> -DEFINE_CLK_SMD_RPM(sm6375, mmnrt_clk, mmnrt_a_clk, QCOM_SMD_RPM_MMXI_CLK, 0);
> -DEFINE_CLK_SMD_RPM(sm6375, mmrt_clk, mmrt_a_clk, QCOM_SMD_RPM_MMXI_CLK, 1);
>   DEFINE_CLK_SMD_RPM(qcm2290, hwkm_clk, hwkm_a_clk, QCOM_SMD_RPM_HWKM_CLK, 0);
>   DEFINE_CLK_SMD_RPM(qcm2290, pka_clk, pka_a_clk, QCOM_SMD_RPM_PKA_CLK, 0);
>   DEFINE_CLK_SMD_RPM_BRANCH(sm6375, bimc_freq_log, bimc_freq_log_a, QCOM_SMD_RPM_MISC_CLK, 4, 1);
> @@ -1140,10 +1138,10 @@ static struct clk_smd_rpm *sm6375_clks[] = {
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
>   	[RPM_SMD_QUP_A_CLK] = &sm6125_qup_a_clk,
> -	[RPM_SMD_MMRT_CLK] = &sm6375_mmrt_clk,
> -	[RPM_SMD_MMRT_A_CLK] = &sm6375_mmrt_a_clk,
> -	[RPM_SMD_MMNRT_CLK] = &sm6375_mmnrt_clk,
> -	[RPM_SMD_MMNRT_A_CLK] = &sm6375_mmnrt_a_clk,
> +	[RPM_SMD_MMRT_CLK] = &sm6125_mmrt_clk,
> +	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
> +	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
> +	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
>   	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
>   	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
>   	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
> diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h
> index 3ab8c07f71c0..82c9d489833a 100644
> --- a/include/linux/soc/qcom/smd-rpm.h
> +++ b/include/linux/soc/qcom/smd-rpm.h
> @@ -41,7 +41,6 @@ struct qcom_smd_rpm;
>   #define QCOM_SMD_RPM_HWKM_CLK	0x6d6b7768
>   #define QCOM_SMD_RPM_PKA_CLK	0x616b70
>   #define QCOM_SMD_RPM_MCFG_CLK	0x6766636d
> -#define QCOM_SMD_RPM_MMXI_CLK	0x69786d6d
>   
>   int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm,
>   		       int state,

Alex Elder Dec. 5, 2022, 5:04 p.m. UTC | #10

On 12/3/22 11:57 AM, Dmitry Baryshkov wrote:
> Reuse qcs404's QPIC and BIMC_GPU clock for qcm2290.
> 
> Fixes: 78b727d02815 ("clk: qcom: smd-rpm: Add QCM2290 RPM clock support")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

I'm not going to comment on the "Fixes" tag on this or any of the
later patches in this series.

Shouldn't this line be removed too?

DEFINE_CLK_SMD_RPM(qcm2290, bimc_gpu_clk, bimc_gpu_a_clk,
                    QCOM_SMD_RPM_MEM_CLK, 2);

					-Alex

> ---
>   drivers/clk/qcom/clk-smd-rpm.c | 9 ++++-----
>   1 file changed, 4 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 877ffda42ee9..26c4738eaacf 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -1166,7 +1166,6 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6375 = {
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, ln_bb_clk2, ln_bb_clk2_a, 0x2, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, rf_clk3_a, 6, 38400000);
>   
> -DEFINE_CLK_SMD_RPM(qcm2290, qpic_clk, qpic_a_clk, QCOM_SMD_RPM_QPIC_CLK, 0);
>   DEFINE_CLK_SMD_RPM(qcm2290, cpuss_gnoc_clk, cpuss_gnoc_a_clk,
>   		   QCOM_SMD_RPM_MEM_CLK, 1);
>   DEFINE_CLK_SMD_RPM(qcm2290, bimc_gpu_clk, bimc_gpu_a_clk,
> @@ -1201,14 +1200,14 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
>   	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
> -	[RPM_SMD_QPIC_CLK] = &qcm2290_qpic_clk,
> -	[RPM_SMD_QPIC_CLK_A] = &qcm2290_qpic_a_clk,
> +	[RPM_SMD_QPIC_CLK] = &qcs404_qpic_clk,
> +	[RPM_SMD_QPIC_CLK_A] = &qcs404_qpic_a_clk,
>   	[RPM_SMD_HWKM_CLK] = &qcm2290_hwkm_clk,
>   	[RPM_SMD_HWKM_A_CLK] = &qcm2290_hwkm_a_clk,
>   	[RPM_SMD_PKA_CLK] = &qcm2290_pka_clk,
>   	[RPM_SMD_PKA_A_CLK] = &qcm2290_pka_a_clk,
> -	[RPM_SMD_BIMC_GPU_CLK] = &qcm2290_bimc_gpu_clk,
> -	[RPM_SMD_BIMC_GPU_A_CLK] = &qcm2290_bimc_gpu_a_clk,
> +	[RPM_SMD_BIMC_GPU_CLK] = &qcs404_bimc_gpu_clk,
> +	[RPM_SMD_BIMC_GPU_A_CLK] = &qcs404_bimc_gpu_a_clk,
>   	[RPM_SMD_CPUSS_GNOC_CLK] = &qcm2290_cpuss_gnoc_clk,
>   	[RPM_SMD_CPUSS_GNOC_A_CLK] = &qcm2290_cpuss_gnoc_a_clk,
>   };

Alex Elder Dec. 5, 2022, 5:04 p.m. UTC | #11

On 12/3/22 11:57 AM, Dmitry Baryshkov wrote:
> The qcm2290's ln_bb_clk2 is identical to the freshly added msm8998's
> ln_bb_clk2 one. Use the latter and drop the SoC-specific version.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Looks good.

Reviewed-by: Alex Elder <elder@linaro.org>

> ---
>   drivers/clk/qcom/clk-smd-rpm.c | 5 ++---
>   1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 42d55bf35a33..6af0753454ea 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -1167,7 +1167,6 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6375 = {
>   };
>   
>   /* QCM2290 */
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, ln_bb_clk2, ln_bb_clk2_a, 0x2, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, rf_clk3_a, 6, 38400000);
>   
>   DEFINE_CLK_SMD_RPM(qcm2290, cpuss_gnoc_clk, cpuss_gnoc_a_clk,
> @@ -1184,8 +1183,8 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &sm6125_qdss_clk,
>   	[RPM_SMD_QDSS_A_CLK] = &sm6125_qdss_a_clk,
> -	[RPM_SMD_LN_BB_CLK2] = &qcm2290_ln_bb_clk2,
> -	[RPM_SMD_LN_BB_CLK2_A] = &qcm2290_ln_bb_clk2_a,
> +	[RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2,
> +	[RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
>   	[RPM_SMD_RF_CLK3] = &qcm2290_rf_clk3,
>   	[RPM_SMD_RF_CLK3_A] = &qcm2290_rf_clk3_a,
>   	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,

Alex Elder Dec. 5, 2022, 5:04 p.m. UTC | #12

On 12/3/22 11:57 AM, Dmitry Baryshkov wrote:
> For each XO_BUFFER_PINCTRL there is a corresponding XO_BUFFER clock.
> Add them automatically to drop the duplication between the clock
> definitions.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

This is a good change.

Reviewed-by: Alex Elder <elder@linaro.org>

> ---
>   drivers/clk/qcom/clk-smd-rpm.c | 47 +++++++++++++---------------------
>   1 file changed, 18 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 3a526a231684..e52e0e242294 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -124,7 +124,10 @@
>   
>   #define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name, _active,	      \
>   					     r_id, r)			      \
> -		__DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active,	      \
> +		DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, _active,	      \
> +					     r_id, r);			      \
> +		__DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name##_pin,	      \
> +		_active##_pin,						      \
>   		QCOM_SMD_RPM_CLK_BUF_A, r_id, 0, r,			      \
>   		QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY)
>   
> @@ -419,14 +422,10 @@ DEFINE_CLK_SMD_RPM(msm8916, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
>   DEFINE_CLK_SMD_RPM(msm8916, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0);
>   DEFINE_CLK_SMD_RPM(qcs404, qpic_clk, qpic_a_clk, QCOM_SMD_RPM_QPIC_CLK, 0);
>   DEFINE_CLK_SMD_RPM_QDSS(msm8916, qdss_clk, qdss_a_clk, QCOM_SMD_RPM_MISC_CLK, 1);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8916, bb_clk1, bb_clk1_a, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8916, bb_clk2, bb_clk2_a, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8916, rf_clk1, rf_clk1_a, 4, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8916, rf_clk2, rf_clk2_a, 5, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk1_pin, bb_clk1_a_pin, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk2_pin, bb_clk2_a_pin, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk1_pin, rf_clk1_a_pin, 4, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2_pin, rf_clk2_a_pin, 5, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk1, bb_clk1_a, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk2, bb_clk2_a, 2, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk1, rf_clk1_a, 4, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2, rf_clk2_a, 5, 19200000);
>   
>   static struct clk_smd_rpm *msm8909_clks[] = {
>   	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
> @@ -534,19 +533,14 @@ DEFINE_CLK_SMD_RPM(msm8974, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
>   DEFINE_CLK_SMD_RPM(msm8974, mmssnoc_ahb_clk, mmssnoc_ahb_a_clk, QCOM_SMD_RPM_BUS_CLK, 3);
>   DEFINE_CLK_SMD_RPM(msm8974, gfx3d_clk_src, gfx3d_a_clk_src, QCOM_SMD_RPM_MEM_CLK, 1);
>   DEFINE_CLK_SMD_RPM(msm8974, ocmemgx_clk, ocmemgx_a_clk, QCOM_SMD_RPM_MEM_CLK, 2);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, cxo_d0, cxo_d0_a, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, cxo_d1, cxo_d1_a, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, cxo_a0, cxo_a0_a, 4, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, cxo_a1, cxo_a1_a, 5, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, cxo_a2, cxo_a2_a, 6, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_a_clk, 7, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_a_clk1, 11, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_a_clk2, 12, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0_pin, cxo_d0_a_pin, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1_pin, cxo_d1_a_pin, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0_pin, cxo_a0_a_pin, 4, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1_pin, cxo_a1_a_pin, 5, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2_pin, cxo_a2_a_pin, 6, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0, cxo_d0_a, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1, cxo_d1_a, 2, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0, cxo_a0_a, 4, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1, cxo_a1_a, 5, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2, cxo_a2_a, 6, 19200000);
>   
>   static struct clk_smd_rpm *msm8974_clks[] = {
>   	[RPM_SMD_PNOC_CLK]		= &msm8916_pcnoc_clk,
> @@ -635,8 +629,7 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8976 = {
>   };
>   
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, div_clk3_a, 13, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(qcs404, ln_bb_clk, ln_bb_clk_a, 8, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk_pin, ln_bb_clk_a_pin, 8, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk, ln_bb_clk_a, 8, 19200000);
>   
>   DEFINE_CLK_SMD_RPM(msm8992, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0);
>   DEFINE_CLK_SMD_RPM(msm8992, ce2_clk, ce2_a_clk, QCOM_SMD_RPM_CE_CLK, 1);
> @@ -852,18 +845,14 @@ static const struct rpm_smd_clk_desc rpm_clk_qcs404 = {
>   	.num_clks = ARRAY_SIZE(qcs404_clks),
>   };
>   
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk1, ln_bb_clk1_a, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk1_pin, ln_bb_clk1_a_pin, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk2, ln_bb_clk2_a, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk2_pin, ln_bb_clk2_a_pin, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3_pin, ln_bb_clk3_a_pin, 3, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk1, ln_bb_clk1_a, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk2, ln_bb_clk2_a, 2, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000);
>   DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc_clk, aggre1_noc_a_clk,
>   		   QCOM_SMD_RPM_AGGR_CLK, 1);
>   DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc_clk, aggre2_noc_a_clk,
>   		   QCOM_SMD_RPM_AGGR_CLK, 2);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk3, rf_clk3_a, 6, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3_pin, rf_clk3_a_pin, 6, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3, rf_clk3_a, 6, 19200000);
>   
>   static struct clk_smd_rpm *msm8998_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo,

Alex Elder Dec. 5, 2022, 5:05 p.m. UTC | #13

On 12/3/22 11:58 AM, Dmitry Baryshkov wrote:
> Rename msm8974_diff_a_clk, msm8974_div_a_clk1 and msm8974_div_a_clk2 to
> move the _a suffix to the end of the name. This follows the patter used

s/patter/pattern/

> by other active-only clocks and thus makes it possible to simplify clock
> definitions.
> This changes the userspace-visible names for this clocks.

Hmmm, is that OK?  (I think it is, because I don't know of any
tool that explicitly relies on these clock names.)  They should
have been named consistently to begin with.

Aside from that, I think this looks good.

Reviewed-by: Alex Elder <elder@linaro.org>

> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/clk/qcom/clk-smd-rpm.c | 34 +++++++++++++++++-----------------
>   1 file changed, 17 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 761a5b0b4b94..cb47d69889fb 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -474,9 +474,9 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0, cxo_a0_a, 4, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1, cxo_a1_a, 5, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2, cxo_a2_a, 6, 19200000);
>   
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_a_clk, 7, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_a_clk1, 11, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_a_clk2, 12, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_clk_a, 7, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_clk1_a, 11, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_clk2_a, 12, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, div_clk3_a, 13, 19200000);
>   
>   static struct clk_smd_rpm *msm8909_clks[] = {
> @@ -607,11 +607,11 @@ static struct clk_smd_rpm *msm8974_clks[] = {
>   	[RPM_SMD_CXO_A2]		= &msm8974_cxo_a2,
>   	[RPM_SMD_CXO_A2_A]		= &msm8974_cxo_a2_a,
>   	[RPM_SMD_DIFF_CLK]		= &msm8974_diff_clk,
> -	[RPM_SMD_DIFF_A_CLK]		= &msm8974_diff_a_clk,
> +	[RPM_SMD_DIFF_A_CLK]		= &msm8974_diff_clk_a,
>   	[RPM_SMD_DIV_CLK1]		= &msm8974_div_clk1,
> -	[RPM_SMD_DIV_A_CLK1]		= &msm8974_div_a_clk1,
> +	[RPM_SMD_DIV_A_CLK1]		= &msm8974_div_clk1_a,
>   	[RPM_SMD_DIV_CLK2]		= &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2]		= &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2]		= &msm8974_div_clk2_a,
>   	[RPM_SMD_CXO_D0_PIN]		= &msm8974_cxo_d0_pin,
>   	[RPM_SMD_CXO_D0_A_PIN]		= &msm8974_cxo_d0_a_pin,
>   	[RPM_SMD_CXO_D1_PIN]		= &msm8974_cxo_d1_pin,
> @@ -653,7 +653,7 @@ static struct clk_smd_rpm *msm8976_clks[] = {
>   	[RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin,
>   	[RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin,
>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   };
> @@ -687,9 +687,9 @@ static struct clk_smd_rpm *msm8992_clks[] = {
>   	[RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin,
>   	[RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin,
>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>   	[RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
>   	[RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
> @@ -745,9 +745,9 @@ static struct clk_smd_rpm *msm8994_clks[] = {
>   	[RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin,
>   	[RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin,
>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>   	[RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
>   	[RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
> @@ -813,9 +813,9 @@ static struct clk_smd_rpm *msm8996_clks[] = {
>   	[RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>   	[RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>   	[RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
>   	[RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>   	[RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin,
> @@ -875,9 +875,9 @@ static struct clk_smd_rpm *msm8998_clks[] = {
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>   	[RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
>   	[RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
> @@ -945,7 +945,7 @@ static struct clk_smd_rpm *sdm660_clks[] = {
>   	[RPM_SMD_RF_CLK1] = &msm8916_rf_clk1,
>   	[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>   	[RPM_SMD_LN_BB_CLK] = &msm8998_ln_bb_clk1,
>   	[RPM_SMD_LN_BB_A_CLK] = &msm8998_ln_bb_clk1_a,
>   	[RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2,
> @@ -1013,7 +1013,7 @@ static struct clk_smd_rpm *msm8953_clks[] = {
>   	[RPM_SMD_RF_CLK3]		= &qcs404_ln_bb_clk,
>   	[RPM_SMD_RF_CLK3_A]		= &qcs404_ln_bb_clk_a,
>   	[RPM_SMD_DIV_CLK2]		= &msm8974_div_clk2,
> -	[RPM_SMD_DIV_A_CLK2]		= &msm8974_div_a_clk2,
> +	[RPM_SMD_DIV_A_CLK2]		= &msm8974_div_clk2_a,
>   	[RPM_SMD_BB_CLK1_PIN]		= &msm8916_bb_clk1_pin,
>   	[RPM_SMD_BB_CLK1_A_PIN]		= &msm8916_bb_clk1_a_pin,
>   	[RPM_SMD_BB_CLK2_PIN]		= &msm8916_bb_clk2_pin,

Alex Elder Dec. 5, 2022, 5:05 p.m. UTC | #14

On 12/3/22 11:58 AM, Dmitry Baryshkov wrote:
> Remove the duplication between the names of the normal and active-only
> XO_BUFFER and XO_BUFFER_PINCTRL clocks by using preprocessor logic to
> add _a suffix.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

This is nice.  See two comments below.

Reviewed-by: Alex Elder <elder@linaro.org>

> ---
>   drivers/clk/qcom/clk-smd-rpm.c | 54 +++++++++++++++++-----------------
>   1 file changed, 27 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index cb47d69889fb..9f33dbd60e96 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -112,17 +112,17 @@
>   		__DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id,   \
>   		QCOM_RPM_SMD_KEY_STATE)
>   
> -#define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, _active, r_id, r)      \
> -		__DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active,	      \
> +#define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, r_id, r)		      \
> +		__DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _name##_a,      \
>   		QCOM_SMD_RPM_CLK_BUF_A, r_id, r,			      \
>   		QCOM_RPM_KEY_SOFTWARE_ENABLE)
>   
> -#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name, _active,	      \
> +#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name,		      \
>   					     r_id, r)			      \

Can the above line be merged with its predecessor?

(I now have looked at later patches, and I see you add a new argument
that makes this original alignment still make sense.  If that's why
you didn't here, you've done the right thing.)

> -		DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, _active,	      \
> +		DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name,		      \
>   					     r_id, r);			      \

Same comment here.

>   		__DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name##_pin,	      \
> -		_active##_pin,						      \
> +		_name##_a##_pin,					      \
>   		QCOM_SMD_RPM_CLK_BUF_A, r_id, r,			      \
>   		QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY)
>   
> @@ -456,28 +456,28 @@ DEFINE_CLK_SMD_RPM(qcs404, qpic_clk, qpic_a_clk, QCOM_SMD_RPM_QPIC_CLK, 0);
>   
>   DEFINE_CLK_SMD_RPM(sm6125, qup_clk, qup_a_clk, QCOM_SMD_RPM_QUP_CLK, 0);
>   
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk1, bb_clk1_a, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk2, bb_clk2_a, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk1, ln_bb_clk1_a, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk2, ln_bb_clk2_a, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk1, rf_clk1_a, 4, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2, rf_clk2_a, 5, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3, rf_clk3_a, 6, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk, ln_bb_clk_a, 8, 19200000);
> -
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, rf_clk3_a, 6, 38400000);
> -
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0, cxo_d0_a, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1, cxo_d1_a, 2, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0, cxo_a0_a, 4, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1, cxo_a1_a, 5, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2, cxo_a2_a, 6, 19200000);
> -
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_clk_a, 7, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_clk1_a, 11, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_clk2_a, 12, 19200000);
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, div_clk3_a, 13, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk1, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk2, 2, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk1, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk2, 2, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3, 3, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk1, 4, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2, 5, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3, 6, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk, 8, 19200000);
> +
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, 6, 38400000);
> +
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1, 2, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0, 4, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1, 5, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2, 6, 19200000);
> +
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, 7, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, 11, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, 12, 19200000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, 13, 19200000);
>   
>   static struct clk_smd_rpm *msm8909_clks[] = {
>   	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,

Alex Elder Dec. 5, 2022, 5:05 p.m. UTC | #15

On 12/3/22 11:58 AM, Dmitry Baryshkov wrote:
> Rename the qcm2290_rf_clk3 clocks adding 38m4 prefix to distinguish it
> form the common (19.2 MHz) rf_clk3. The system (and userspace) name of

s/form/from/

> these clocks remains intact.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Otherwise, looks good.

Reviewed-by: Alex Elder <elder@linaro.org>

> ---
>   drivers/clk/qcom/clk-smd-rpm.c | 11 ++++++++---
>   1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 8dcaa63b0623..f407acb3c6d3 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -125,6 +125,11 @@
>   		QCOM_SMD_RPM_CLK_BUF_A, r_id, r,			      \
>   		QCOM_RPM_KEY_SOFTWARE_ENABLE)
>   
> +#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PREFIX(_platform, _prefix, _name, r_id, r)	      \
> +		__DEFINE_CLK_SMD_RPM_BRANCH(_platform, _prefix, _name, _name##_a,    \
> +		QCOM_SMD_RPM_CLK_BUF_A, r_id, r,			      \
> +		QCOM_RPM_KEY_SOFTWARE_ENABLE)
> +
>   #define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name,		      \
>   					     r_id, r)			      \
>   		DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name,		      \
> @@ -474,7 +479,7 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2, 5, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3, 6, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk, 8, 19200000);
>   
> -DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, 6, 38400000);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PREFIX(qcm2290, 38m4_, rf_clk3, 6, 38400000);
>   
>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0, 1, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1, 2, 19200000);
> @@ -1164,8 +1169,8 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
>   	[RPM_SMD_QDSS_A_CLK] = &sm6125_branch_qdss_a_clk,
>   	[RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2,
>   	[RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
> -	[RPM_SMD_RF_CLK3] = &qcm2290_rf_clk3,
> -	[RPM_SMD_RF_CLK3_A] = &qcm2290_rf_clk3_a,
> +	[RPM_SMD_RF_CLK3] = &qcm2290_38m4_rf_clk3,
> +	[RPM_SMD_RF_CLK3_A] = &qcm2290_38m4_rf_clk3_a,
>   	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
>   	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,

Alex Elder Dec. 5, 2022, 5:05 p.m. UTC | #16

On 12/3/22 11:58 AM, Dmitry Baryshkov wrote:
> Add special macro for the clocks of QCOM_SMD_RPM_BUS_CLK type. Use it to
> insert the _bus_N part into the clock symbol name. The system (and
> userspace) name of these clocks remains intact.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Once again you're passing "empty" arguments to macros, which I
really don't like.  Can you please try to do two variants, one
which takes something in that "empty" spot and another that
doesn't?  For example, here you could just add a new macro,
__DEFINE_CLK_SMD_RPM_PREFIX() that takes the additional argument.

I suppose this could get messy (with duplication).  Another
alternative would be to have the existing macro call the new
"prefix" one, but have that be the *only* place an empty value
is passed as the argument.  And add a comment calling attention
to/explaining that.  Maybe even put /* empty */ there.

					-Alex

> ---
>   drivers/clk/qcom/clk-smd-rpm.c | 253 +++++++++++++++++----------------
>   1 file changed, 129 insertions(+), 124 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index f407acb3c6d3..b37e5d883a10 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -25,13 +25,13 @@
>   #define QCOM_RPM_SMD_KEY_STATE				0x54415453
>   #define QCOM_RPM_SCALING_ENABLE_ID			0x2
>   
> -#define __DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id, key)      \
> -	static struct clk_smd_rpm _platform##_##_active;		      \
> -	static struct clk_smd_rpm _platform##_##_name = {		      \
> +#define __DEFINE_CLK_SMD_RPM(_platform, _prefix, _name, _active, type, r_id, key)      \
> +	static struct clk_smd_rpm _platform##_##_prefix##_active;	      \
> +	static struct clk_smd_rpm _platform##_##_prefix##_name = {	      \
>   		.rpm_res_type = (type),					      \
>   		.rpm_clk_id = (r_id),					      \
>   		.rpm_key = (key),					      \
> -		.peer = &_platform##_##_active,				      \
> +		.peer = &_platform##_##_prefix##_active,		      \
>   		.rate = INT_MAX,					      \
>   		.hw.init = &(struct clk_init_data){			      \
>   			.ops = &clk_smd_rpm_ops,			      \
> @@ -43,12 +43,12 @@
>   			.num_parents = 1,				      \
>   		},							      \
>   	};								      \
> -	static struct clk_smd_rpm _platform##_##_active = {		      \
> +	static struct clk_smd_rpm _platform##_##_prefix##_active = {	      \
>   		.rpm_res_type = (type),					      \
>   		.rpm_clk_id = (r_id),					      \
>   		.active_only = true,					      \
>   		.rpm_key = (key),					      \
> -		.peer = &_platform##_##_name,				      \
> +		.peer = &_platform##_##_prefix##_name,			      \
>   		.rate = INT_MAX,					      \
>   		.hw.init = &(struct clk_init_data){			      \
>   			.ops = &clk_smd_rpm_ops,			      \
> @@ -101,11 +101,16 @@
>   	}
>   
>   #define DEFINE_CLK_SMD_RPM(_platform, _name, type, r_id)		      \
> -		__DEFINE_CLK_SMD_RPM(_platform, _name##_clk, _name##_a_clk, type, r_id,   \
> +		__DEFINE_CLK_SMD_RPM(_platform, , _name##_clk, _name##_a_clk, type, r_id,   \
> +		QCOM_RPM_SMD_KEY_RATE)
> +
> +#define DEFINE_CLK_SMD_RPM_BUS(_platform, _name, r_id)			      \
> +		__DEFINE_CLK_SMD_RPM(_platform, bus_##r_id##_,		      \
> +		_name##_clk, _name##_a_clk, QCOM_SMD_RPM_BUS_CLK, r_id,	      \
>   		QCOM_RPM_SMD_KEY_RATE)
>   
>   #define DEFINE_CLK_SMD_RPM_CLK_SRC(_platform, _name, type, r_id)	      \
> -		__DEFINE_CLK_SMD_RPM(_platform, _name##_clk_src, _name##_a_clk_src, type, r_id,   \
> +		__DEFINE_CLK_SMD_RPM(_platform, , _name##_clk_src, _name##_a_clk_src, type, r_id,   \
>   		QCOM_RPM_SMD_KEY_RATE)
>   
>   #define DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, type, r_id, r)	      \
> @@ -117,7 +122,7 @@
>   		r_id, r, QCOM_RPM_SMD_KEY_ENABLE)
>   
>   #define DEFINE_CLK_SMD_RPM_QDSS(_platform, _name, type, r_id)		      \
> -		__DEFINE_CLK_SMD_RPM(_platform, _name##_clk, _name##_a_clk, type, r_id,   \
> +		__DEFINE_CLK_SMD_RPM(_platform, , _name##_clk, _name##_a_clk, type, r_id,   \
>   		QCOM_RPM_SMD_KEY_STATE)
>   
>   #define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, r_id, r)		      \
> @@ -435,15 +440,15 @@ DEFINE_CLK_SMD_RPM_BRANCH(msm8996, aggre2_noc, QCOM_SMD_RPM_AGGR_CLK, 2, 1000);
>   DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc, QCOM_SMD_RPM_AGGR_CLK, 1);
>   DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc, QCOM_SMD_RPM_AGGR_CLK, 2);
>   
> -DEFINE_CLK_SMD_RPM(msm8916, pcnoc, QCOM_SMD_RPM_BUS_CLK, 0);
> -DEFINE_CLK_SMD_RPM(msm8916, snoc, QCOM_SMD_RPM_BUS_CLK, 1);
> -DEFINE_CLK_SMD_RPM(msm8936, sysmmnoc, QCOM_SMD_RPM_BUS_CLK, 2);
> -DEFINE_CLK_SMD_RPM(msm8974, cnoc, QCOM_SMD_RPM_BUS_CLK, 2);
> -DEFINE_CLK_SMD_RPM(msm8974, mmssnoc_ahb, QCOM_SMD_RPM_BUS_CLK, 3);
> -DEFINE_CLK_SMD_RPM(sm6125, snoc_periph, QCOM_SMD_RPM_BUS_CLK, 0);
> -DEFINE_CLK_SMD_RPM(sm6125, cnoc, QCOM_SMD_RPM_BUS_CLK, 1);
> -DEFINE_CLK_SMD_RPM(sm6125, snoc, QCOM_SMD_RPM_BUS_CLK, 2);
> -DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass, QCOM_SMD_RPM_BUS_CLK, 5);
> +DEFINE_CLK_SMD_RPM_BUS(msm8916, pcnoc, 0);
> +DEFINE_CLK_SMD_RPM_BUS(msm8916, snoc, 1);
> +DEFINE_CLK_SMD_RPM_BUS(msm8936, sysmmnoc, 2);
> +DEFINE_CLK_SMD_RPM_BUS(msm8974, cnoc, 2);
> +DEFINE_CLK_SMD_RPM_BUS(msm8974, mmssnoc_ahb, 3);
> +DEFINE_CLK_SMD_RPM_BUS(sm6125, snoc_periph, 0);
> +DEFINE_CLK_SMD_RPM_BUS(sm6125, cnoc, 1);
> +DEFINE_CLK_SMD_RPM_BUS(sm6125, snoc, 2);
> +DEFINE_CLK_SMD_RPM_BUS(sm6125, snoc_lpass, 5);
>   
>   DEFINE_CLK_SMD_RPM(msm8916, bimc, QCOM_SMD_RPM_MEM_CLK, 0);
>   DEFINE_CLK_SMD_RPM(qcm2290, cpuss_gnoc, QCOM_SMD_RPM_MEM_CLK, 1);
> @@ -493,10 +498,10 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, 12, 19200000);
>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, 13, 19200000);
>   
>   static struct clk_smd_rpm *msm8909_clks[] = {
> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>   	[RPM_SMD_QPIC_CLK]		= &qcs404_qpic_clk,
> @@ -527,10 +532,10 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8909 = {
>   };
>   
>   static struct clk_smd_rpm *msm8916_clks[] = {
> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>   	[RPM_SMD_QDSS_CLK]		= &msm8916_qdss_clk,
> @@ -559,14 +564,14 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8916 = {
>   };
>   
>   static struct clk_smd_rpm *msm8936_clks[] = {
> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
> -	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_sysmmnoc_clk,
> -	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_sysmmnoc_a_clk,
> +	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_bus_2_sysmmnoc_clk,
> +	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_bus_2_sysmmnoc_a_clk,
>   	[RPM_SMD_QDSS_CLK]		= &msm8916_qdss_clk,
>   	[RPM_SMD_QDSS_A_CLK]		= &msm8916_qdss_a_clk,
>   	[RPM_SMD_BB_CLK1]		= &msm8916_bb_clk1,
> @@ -593,14 +598,14 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8936 = {
>   };
>   
>   static struct clk_smd_rpm *msm8974_clks[] = {
> -	[RPM_SMD_PNOC_CLK]		= &msm8916_pcnoc_clk,
> -	[RPM_SMD_PNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
> -	[RPM_SMD_CNOC_CLK]		= &msm8974_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK]		= &msm8974_cnoc_a_clk,
> -	[RPM_SMD_MMSSNOC_AHB_CLK]	= &msm8974_mmssnoc_ahb_clk,
> -	[RPM_SMD_MMSSNOC_AHB_A_CLK]	= &msm8974_mmssnoc_ahb_a_clk,
> +	[RPM_SMD_PNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
> +	[RPM_SMD_CNOC_CLK]		= &msm8974_bus_2_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK]		= &msm8974_bus_2_cnoc_a_clk,
> +	[RPM_SMD_MMSSNOC_AHB_CLK]	= &msm8974_bus_3_mmssnoc_ahb_clk,
> +	[RPM_SMD_MMSSNOC_AHB_A_CLK]	= &msm8974_bus_3_mmssnoc_ahb_a_clk,
>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>   	[RPM_SMD_GFX3D_CLK_SRC]		= &msm8974_gfx3d_clk_src,
>   	[RPM_SMD_GFX3D_A_CLK_SRC]	= &msm8974_gfx3d_a_clk_src,
> @@ -645,14 +650,14 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8974 = {
>   static struct clk_smd_rpm *msm8976_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
> -	[RPM_SMD_SYSMMNOC_CLK]	= &msm8936_sysmmnoc_clk,
> -	[RPM_SMD_SYSMMNOC_A_CLK] = &msm8936_sysmmnoc_a_clk,
> +	[RPM_SMD_SYSMMNOC_CLK]	= &msm8936_bus_2_sysmmnoc_clk,
> +	[RPM_SMD_SYSMMNOC_A_CLK] = &msm8936_bus_2_sysmmnoc_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
>   	[RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk,
>   	[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
> @@ -679,18 +684,18 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8976 = {
>   static struct clk_smd_rpm *msm8992_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
> +	[RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>   	[RPM_SMD_OCMEMGX_CLK] = &msm8974_ocmemgx_clk,
>   	[RPM_SMD_OCMEMGX_A_CLK] = &msm8974_ocmemgx_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>   	[RPM_SMD_GFX3D_CLK_SRC] = &msm8974_gfx3d_clk_src,
>   	[RPM_SMD_GFX3D_A_CLK_SRC] = &msm8974_gfx3d_a_clk_src,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
>   	[RPM_SMD_BB_CLK1_A] = &msm8916_bb_clk1_a,
>   	[RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin,
> @@ -709,8 +714,8 @@ static struct clk_smd_rpm *msm8992_clks[] = {
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>   	[RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
> -	[RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk,
> -	[RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk,
> +	[RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_bus_3_mmssnoc_ahb_clk,
> +	[RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_bus_3_mmssnoc_ahb_a_clk,
>   	[RPM_SMD_MSS_CFG_AHB_CLK] = &msm8992_branch_mss_cfg_ahb_clk,
>   	[RPM_SMD_MSS_CFG_AHB_A_CLK] = &msm8992_branch_mss_cfg_ahb_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
> @@ -737,18 +742,18 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8992 = {
>   static struct clk_smd_rpm *msm8994_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
> +	[RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>   	[RPM_SMD_OCMEMGX_CLK] = &msm8974_ocmemgx_clk,
>   	[RPM_SMD_OCMEMGX_A_CLK] = &msm8974_ocmemgx_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>   	[RPM_SMD_GFX3D_CLK_SRC] = &msm8974_gfx3d_clk_src,
>   	[RPM_SMD_GFX3D_A_CLK_SRC] = &msm8974_gfx3d_a_clk_src,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
>   	[RPM_SMD_BB_CLK1_A] = &msm8916_bb_clk1_a,
>   	[RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin,
> @@ -767,8 +772,8 @@ static struct clk_smd_rpm *msm8994_clks[] = {
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>   	[RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
> -	[RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk,
> -	[RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk,
> +	[RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_bus_3_mmssnoc_ahb_clk,
> +	[RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_bus_3_mmssnoc_ahb_a_clk,
>   	[RPM_SMD_MSS_CFG_AHB_CLK] = &msm8992_branch_mss_cfg_ahb_clk,
>   	[RPM_SMD_MSS_CFG_AHB_A_CLK] = &msm8992_branch_mss_cfg_ahb_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
> @@ -795,12 +800,12 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8994 = {
>   };
>   
>   static struct clk_smd_rpm *msm8996_clks[] = {
> -	[RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_MMAXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk,
> @@ -849,10 +854,10 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8996 = {
>   static struct clk_smd_rpm *qcs404_clks[] = {
>   	[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
>   	[RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk,
> -	[RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> +	[RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_BIMC_GPU_CLK] = &qcs404_bimc_gpu_clk,
> @@ -879,12 +884,12 @@ static struct clk_smd_rpm *msm8998_clks[] = {
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
> -	[RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
> @@ -937,12 +942,12 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8998 = {
>   static struct clk_smd_rpm *sdm660_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
> -	[RPM_SMD_CNOC_PERIPH_CLK] = &msm8916_pcnoc_clk,
> -	[RPM_SMD_CNOC_PERIPH_A_CLK] = &msm8916_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
> +	[RPM_SMD_CNOC_PERIPH_CLK] = &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_CNOC_PERIPH_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_MMSSNOC_AXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk,
> @@ -983,8 +988,8 @@ static const struct rpm_smd_clk_desc rpm_clk_sdm660 = {
>   static struct clk_smd_rpm *mdm9607_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC]		= &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC]		= &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>   	[RPM_SMD_QPIC_CLK]		= &qcs404_qpic_clk,
> @@ -1005,16 +1010,16 @@ static const struct rpm_smd_clk_desc rpm_clk_mdm9607 = {
>   static struct clk_smd_rpm *msm8953_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC]		= &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC]		= &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>   	[RPM_SMD_IPA_CLK]		= &msm8976_ipa_clk,
>   	[RPM_SMD_IPA_A_CLK]		= &msm8976_ipa_a_clk,
> -	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_sysmmnoc_clk,
> -	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_sysmmnoc_a_clk,
> +	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_bus_2_sysmmnoc_clk,
> +	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_bus_2_sysmmnoc_a_clk,
>   	[RPM_SMD_QDSS_CLK]		= &msm8916_qdss_clk,
>   	[RPM_SMD_QDSS_A_CLK]		= &msm8916_qdss_a_clk,
>   	[RPM_SMD_BB_CLK1]		= &msm8916_bb_clk1,
> @@ -1041,8 +1046,8 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8953 = {
>   static struct clk_smd_rpm *sm6125_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
> @@ -1051,8 +1056,8 @@ static struct clk_smd_rpm *sm6125_clks[] = {
>   	[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
>   	[RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,
>   	[RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,
> -	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
> @@ -1069,10 +1074,10 @@ static struct clk_smd_rpm *sm6125_clks[] = {
>   	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
>   	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
>   	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
> -	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
> -	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
> -	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
> -	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
> +	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
> +	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
> +	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
> +	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
>   };
>   
>   static const struct rpm_smd_clk_desc rpm_clk_sm6125 = {
> @@ -1084,8 +1089,8 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6125 = {
>   static struct clk_smd_rpm *sm6115_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
> @@ -1094,8 +1099,8 @@ static struct clk_smd_rpm *sm6115_clks[] = {
>   	[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
>   	[RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,
>   	[RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,
> -	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
> @@ -1106,10 +1111,10 @@ static struct clk_smd_rpm *sm6115_clks[] = {
>   	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
>   	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
>   	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
> -	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
> -	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
> -	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
> -	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
> +	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
> +	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
> +	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
> +	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
>   	[RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin,
>   	[RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin,
>   	[RPM_SMD_RF_CLK2_PIN] = &msm8916_rf_clk2_pin,
> @@ -1124,14 +1129,14 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6115 = {
>   static struct clk_smd_rpm *sm6375_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
>   	[RPM_SMD_QDSS_A_CLK] = &sm6125_branch_qdss_a_clk,
> -	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
> @@ -1140,10 +1145,10 @@ static struct clk_smd_rpm *sm6375_clks[] = {
>   	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
>   	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
>   	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
> -	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
> -	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
> -	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
> -	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
> +	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
> +	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
> +	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
> +	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>   	[RPM_SMD_HWKM_CLK] = &qcm2290_hwkm_clk,
> @@ -1161,8 +1166,8 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6375 = {
>   static struct clk_smd_rpm *qcm2290_clks[] = {
>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
> -	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
> -	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
> +	[RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
> +	[RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>   	[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
> @@ -1171,8 +1176,8 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
>   	[RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
>   	[RPM_SMD_RF_CLK3] = &qcm2290_38m4_rf_clk3,
>   	[RPM_SMD_RF_CLK3_A] = &qcm2290_38m4_rf_clk3_a,
> -	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
> -	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
> +	[RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
> +	[RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>   	[RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
> @@ -1181,10 +1186,10 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
>   	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
>   	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
>   	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
> -	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
> -	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
> -	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
> -	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
> +	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
> +	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
> +	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
> +	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>   	[RPM_SMD_QPIC_CLK] = &qcs404_qpic_clk,

Dmitry Baryshkov Dec. 5, 2022, 9:40 p.m. UTC | #17

On 5 December 2022 20:05:10 GMT+03:00, Alex Elder <elder@linaro.org> wrote:
>On 12/3/22 11:58 AM, Dmitry Baryshkov wrote:
>> Rename msm8974_diff_a_clk, msm8974_div_a_clk1 and msm8974_div_a_clk2 to
>> move the _a suffix to the end of the name. This follows the patter used
>
>s/patter/pattern/
>
>> by other active-only clocks and thus makes it possible to simplify clock
>> definitions.
>> This changes the userspace-visible names for this clocks.
>
>Hmmm, is that OK?  (I think it is, because I don't know of any
>tool that explicitly relies on these clock names.)  They should
>have been named consistently to begin with.

As far as I know, nothing depends on these names. Especially not on active-only ones.

>
>Aside from that, I think this looks good.
>
>Reviewed-by: Alex Elder <elder@linaro.org>
>
>> 
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>>   drivers/clk/qcom/clk-smd-rpm.c | 34 +++++++++++++++++-----------------
>>   1 file changed, 17 insertions(+), 17 deletions(-)
>> 
>> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
>> index 761a5b0b4b94..cb47d69889fb 100644
>> --- a/drivers/clk/qcom/clk-smd-rpm.c
>> +++ b/drivers/clk/qcom/clk-smd-rpm.c
>> @@ -474,9 +474,9 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0, cxo_a0_a, 4, 19200000);
>>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1, cxo_a1_a, 5, 19200000);
>>   DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2, cxo_a2_a, 6, 19200000);
>>   -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_a_clk, 7, 19200000);
>> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_a_clk1, 11, 19200000);
>> -DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_a_clk2, 12, 19200000);
>> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_clk_a, 7, 19200000);
>> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_clk1_a, 11, 19200000);
>> +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_clk2_a, 12, 19200000);
>>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, div_clk3_a, 13, 19200000);
>>     static struct clk_smd_rpm *msm8909_clks[] = {
>> @@ -607,11 +607,11 @@ static struct clk_smd_rpm *msm8974_clks[] = {
>>   	[RPM_SMD_CXO_A2]		= &msm8974_cxo_a2,
>>   	[RPM_SMD_CXO_A2_A]		= &msm8974_cxo_a2_a,
>>   	[RPM_SMD_DIFF_CLK]		= &msm8974_diff_clk,
>> -	[RPM_SMD_DIFF_A_CLK]		= &msm8974_diff_a_clk,
>> +	[RPM_SMD_DIFF_A_CLK]		= &msm8974_diff_clk_a,
>>   	[RPM_SMD_DIV_CLK1]		= &msm8974_div_clk1,
>> -	[RPM_SMD_DIV_A_CLK1]		= &msm8974_div_a_clk1,
>> +	[RPM_SMD_DIV_A_CLK1]		= &msm8974_div_clk1_a,
>>   	[RPM_SMD_DIV_CLK2]		= &msm8974_div_clk2,
>> -	[RPM_SMD_DIV_A_CLK2]		= &msm8974_div_a_clk2,
>> +	[RPM_SMD_DIV_A_CLK2]		= &msm8974_div_clk2_a,
>>   	[RPM_SMD_CXO_D0_PIN]		= &msm8974_cxo_d0_pin,
>>   	[RPM_SMD_CXO_D0_A_PIN]		= &msm8974_cxo_d0_a_pin,
>>   	[RPM_SMD_CXO_D1_PIN]		= &msm8974_cxo_d1_pin,
>> @@ -653,7 +653,7 @@ static struct clk_smd_rpm *msm8976_clks[] = {
>>   	[RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin,
>>   	[RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin,
>>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
>> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
>> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>>   };
>> @@ -687,9 +687,9 @@ static struct clk_smd_rpm *msm8992_clks[] = {
>>   	[RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin,
>>   	[RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin,
>>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
>> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
>> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
>> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
>> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>>   	[RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
>>   	[RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>> @@ -745,9 +745,9 @@ static struct clk_smd_rpm *msm8994_clks[] = {
>>   	[RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin,
>>   	[RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin,
>>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
>> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
>> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
>> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
>> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>>   	[RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
>>   	[RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>> @@ -813,9 +813,9 @@ static struct clk_smd_rpm *msm8996_clks[] = {
>>   	[RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>>   	[RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
>>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
>> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
>> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
>> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
>> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>>   	[RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
>>   	[RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>>   	[RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin,
>> @@ -875,9 +875,9 @@ static struct clk_smd_rpm *msm8998_clks[] = {
>>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
>> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
>> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>>   	[RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
>> -	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
>> +	[RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
>>   	[RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
>>   	[RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
>>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>> @@ -945,7 +945,7 @@ static struct clk_smd_rpm *sdm660_clks[] = {
>>   	[RPM_SMD_RF_CLK1] = &msm8916_rf_clk1,
>>   	[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
>>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
>> -	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
>> +	[RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
>>   	[RPM_SMD_LN_BB_CLK] = &msm8998_ln_bb_clk1,
>>   	[RPM_SMD_LN_BB_A_CLK] = &msm8998_ln_bb_clk1_a,
>>   	[RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2,
>> @@ -1013,7 +1013,7 @@ static struct clk_smd_rpm *msm8953_clks[] = {
>>   	[RPM_SMD_RF_CLK3]		= &qcs404_ln_bb_clk,
>>   	[RPM_SMD_RF_CLK3_A]		= &qcs404_ln_bb_clk_a,
>>   	[RPM_SMD_DIV_CLK2]		= &msm8974_div_clk2,
>> -	[RPM_SMD_DIV_A_CLK2]		= &msm8974_div_a_clk2,
>> +	[RPM_SMD_DIV_A_CLK2]		= &msm8974_div_clk2_a,
>>   	[RPM_SMD_BB_CLK1_PIN]		= &msm8916_bb_clk1_pin,
>>   	[RPM_SMD_BB_CLK1_A_PIN]		= &msm8916_bb_clk1_a_pin,
>>   	[RPM_SMD_BB_CLK2_PIN]		= &msm8916_bb_clk2_pin,
>

Dmitry Baryshkov Dec. 5, 2022, 9:42 p.m. UTC | #18

On 5 December 2022 20:05:31 GMT+03:00, Alex Elder <elder@linaro.org> wrote:
>On 12/3/22 11:58 AM, Dmitry Baryshkov wrote:
>> Add special macro for the clocks of QCOM_SMD_RPM_BUS_CLK type. Use it to
>> insert the _bus_N part into the clock symbol name. The system (and
>> userspace) name of these clocks remains intact.
>> 
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
>Once again you're passing "empty" arguments to macros, which I
>really don't like.  Can you please try to do two variants, one
>which takes something in that "empty" spot and another that
>doesn't?  For example, here you could just add a new macro,
>__DEFINE_CLK_SMD_RPM_PREFIX() that takes the additional argument.
>
>I suppose this could get messy (with duplication).  Another
>alternative would be to have the existing macro call the new
>"prefix" one, but have that be the *only* place an empty value
>is passed as the argument.  And add a comment calling attention
>to/explaining that.  Maybe even put /* empty */ there.

This looks like a nice suggestion! Thanks, I'll try to implement this for v2.


>
>					-Alex
>
>> ---
>>   drivers/clk/qcom/clk-smd-rpm.c | 253 +++++++++++++++++----------------
>>   1 file changed, 129 insertions(+), 124 deletions(-)
>> 
>> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
>> index f407acb3c6d3..b37e5d883a10 100644
>> --- a/drivers/clk/qcom/clk-smd-rpm.c
>> +++ b/drivers/clk/qcom/clk-smd-rpm.c
>> @@ -25,13 +25,13 @@
>>   #define QCOM_RPM_SMD_KEY_STATE				0x54415453
>>   #define QCOM_RPM_SCALING_ENABLE_ID			0x2
>>   -#define __DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id, key)      \
>> -	static struct clk_smd_rpm _platform##_##_active;		      \
>> -	static struct clk_smd_rpm _platform##_##_name = {		      \
>> +#define __DEFINE_CLK_SMD_RPM(_platform, _prefix, _name, _active, type, r_id, key)      \
>> +	static struct clk_smd_rpm _platform##_##_prefix##_active;	      \
>> +	static struct clk_smd_rpm _platform##_##_prefix##_name = {	      \
>>   		.rpm_res_type = (type),					      \
>>   		.rpm_clk_id = (r_id),					      \
>>   		.rpm_key = (key),					      \
>> -		.peer = &_platform##_##_active,				      \
>> +		.peer = &_platform##_##_prefix##_active,		      \
>>   		.rate = INT_MAX,					      \
>>   		.hw.init = &(struct clk_init_data){			      \
>>   			.ops = &clk_smd_rpm_ops,			      \
>> @@ -43,12 +43,12 @@
>>   			.num_parents = 1,				      \
>>   		},							      \
>>   	};								      \
>> -	static struct clk_smd_rpm _platform##_##_active = {		      \
>> +	static struct clk_smd_rpm _platform##_##_prefix##_active = {	      \
>>   		.rpm_res_type = (type),					      \
>>   		.rpm_clk_id = (r_id),					      \
>>   		.active_only = true,					      \
>>   		.rpm_key = (key),					      \
>> -		.peer = &_platform##_##_name,				      \
>> +		.peer = &_platform##_##_prefix##_name,			      \
>>   		.rate = INT_MAX,					      \
>>   		.hw.init = &(struct clk_init_data){			      \
>>   			.ops = &clk_smd_rpm_ops,			      \
>> @@ -101,11 +101,16 @@
>>   	}
>>     #define DEFINE_CLK_SMD_RPM(_platform, _name, type, r_id)		      \
>> -		__DEFINE_CLK_SMD_RPM(_platform, _name##_clk, _name##_a_clk, type, r_id,   \
>> +		__DEFINE_CLK_SMD_RPM(_platform, , _name##_clk, _name##_a_clk, type, r_id,   \
>> +		QCOM_RPM_SMD_KEY_RATE)
>> +
>> +#define DEFINE_CLK_SMD_RPM_BUS(_platform, _name, r_id)			      \
>> +		__DEFINE_CLK_SMD_RPM(_platform, bus_##r_id##_,		      \
>> +		_name##_clk, _name##_a_clk, QCOM_SMD_RPM_BUS_CLK, r_id,	      \
>>   		QCOM_RPM_SMD_KEY_RATE)
>>     #define DEFINE_CLK_SMD_RPM_CLK_SRC(_platform, _name, type, r_id)	      \
>> -		__DEFINE_CLK_SMD_RPM(_platform, _name##_clk_src, _name##_a_clk_src, type, r_id,   \
>> +		__DEFINE_CLK_SMD_RPM(_platform, , _name##_clk_src, _name##_a_clk_src, type, r_id,   \
>>   		QCOM_RPM_SMD_KEY_RATE)
>>     #define DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, type, r_id, r)	      \
>> @@ -117,7 +122,7 @@
>>   		r_id, r, QCOM_RPM_SMD_KEY_ENABLE)
>>     #define DEFINE_CLK_SMD_RPM_QDSS(_platform, _name, type, r_id)		      \
>> -		__DEFINE_CLK_SMD_RPM(_platform, _name##_clk, _name##_a_clk, type, r_id,   \
>> +		__DEFINE_CLK_SMD_RPM(_platform, , _name##_clk, _name##_a_clk, type, r_id,   \
>>   		QCOM_RPM_SMD_KEY_STATE)
>>     #define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, r_id, r)		      \
>> @@ -435,15 +440,15 @@ DEFINE_CLK_SMD_RPM_BRANCH(msm8996, aggre2_noc, QCOM_SMD_RPM_AGGR_CLK, 2, 1000);
>>   DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc, QCOM_SMD_RPM_AGGR_CLK, 1);
>>   DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc, QCOM_SMD_RPM_AGGR_CLK, 2);
>>   -DEFINE_CLK_SMD_RPM(msm8916, pcnoc, QCOM_SMD_RPM_BUS_CLK, 0);
>> -DEFINE_CLK_SMD_RPM(msm8916, snoc, QCOM_SMD_RPM_BUS_CLK, 1);
>> -DEFINE_CLK_SMD_RPM(msm8936, sysmmnoc, QCOM_SMD_RPM_BUS_CLK, 2);
>> -DEFINE_CLK_SMD_RPM(msm8974, cnoc, QCOM_SMD_RPM_BUS_CLK, 2);
>> -DEFINE_CLK_SMD_RPM(msm8974, mmssnoc_ahb, QCOM_SMD_RPM_BUS_CLK, 3);
>> -DEFINE_CLK_SMD_RPM(sm6125, snoc_periph, QCOM_SMD_RPM_BUS_CLK, 0);
>> -DEFINE_CLK_SMD_RPM(sm6125, cnoc, QCOM_SMD_RPM_BUS_CLK, 1);
>> -DEFINE_CLK_SMD_RPM(sm6125, snoc, QCOM_SMD_RPM_BUS_CLK, 2);
>> -DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass, QCOM_SMD_RPM_BUS_CLK, 5);
>> +DEFINE_CLK_SMD_RPM_BUS(msm8916, pcnoc, 0);
>> +DEFINE_CLK_SMD_RPM_BUS(msm8916, snoc, 1);
>> +DEFINE_CLK_SMD_RPM_BUS(msm8936, sysmmnoc, 2);
>> +DEFINE_CLK_SMD_RPM_BUS(msm8974, cnoc, 2);
>> +DEFINE_CLK_SMD_RPM_BUS(msm8974, mmssnoc_ahb, 3);
>> +DEFINE_CLK_SMD_RPM_BUS(sm6125, snoc_periph, 0);
>> +DEFINE_CLK_SMD_RPM_BUS(sm6125, cnoc, 1);
>> +DEFINE_CLK_SMD_RPM_BUS(sm6125, snoc, 2);
>> +DEFINE_CLK_SMD_RPM_BUS(sm6125, snoc_lpass, 5);
>>     DEFINE_CLK_SMD_RPM(msm8916, bimc, QCOM_SMD_RPM_MEM_CLK, 0);
>>   DEFINE_CLK_SMD_RPM(qcm2290, cpuss_gnoc, QCOM_SMD_RPM_MEM_CLK, 1);
>> @@ -493,10 +498,10 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, 12, 19200000);
>>   DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, 13, 19200000);
>>     static struct clk_smd_rpm *msm8909_clks[] = {
>> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
>> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
>> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
>> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>>   	[RPM_SMD_QPIC_CLK]		= &qcs404_qpic_clk,
>> @@ -527,10 +532,10 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8909 = {
>>   };
>>     static struct clk_smd_rpm *msm8916_clks[] = {
>> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
>> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
>> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
>> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>>   	[RPM_SMD_QDSS_CLK]		= &msm8916_qdss_clk,
>> @@ -559,14 +564,14 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8916 = {
>>   };
>>     static struct clk_smd_rpm *msm8936_clks[] = {
>> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
>> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
>> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
>> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>> -	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_sysmmnoc_clk,
>> -	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_sysmmnoc_a_clk,
>> +	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_bus_2_sysmmnoc_clk,
>> +	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_bus_2_sysmmnoc_a_clk,
>>   	[RPM_SMD_QDSS_CLK]		= &msm8916_qdss_clk,
>>   	[RPM_SMD_QDSS_A_CLK]		= &msm8916_qdss_a_clk,
>>   	[RPM_SMD_BB_CLK1]		= &msm8916_bb_clk1,
>> @@ -593,14 +598,14 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8936 = {
>>   };
>>     static struct clk_smd_rpm *msm8974_clks[] = {
>> -	[RPM_SMD_PNOC_CLK]		= &msm8916_pcnoc_clk,
>> -	[RPM_SMD_PNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
>> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
>> -	[RPM_SMD_CNOC_CLK]		= &msm8974_cnoc_clk,
>> -	[RPM_SMD_CNOC_A_CLK]		= &msm8974_cnoc_a_clk,
>> -	[RPM_SMD_MMSSNOC_AHB_CLK]	= &msm8974_mmssnoc_ahb_clk,
>> -	[RPM_SMD_MMSSNOC_AHB_A_CLK]	= &msm8974_mmssnoc_ahb_a_clk,
>> +	[RPM_SMD_PNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_PNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>> +	[RPM_SMD_CNOC_CLK]		= &msm8974_bus_2_cnoc_clk,
>> +	[RPM_SMD_CNOC_A_CLK]		= &msm8974_bus_2_cnoc_a_clk,
>> +	[RPM_SMD_MMSSNOC_AHB_CLK]	= &msm8974_bus_3_mmssnoc_ahb_clk,
>> +	[RPM_SMD_MMSSNOC_AHB_A_CLK]	= &msm8974_bus_3_mmssnoc_ahb_a_clk,
>>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>>   	[RPM_SMD_GFX3D_CLK_SRC]		= &msm8974_gfx3d_clk_src,
>>   	[RPM_SMD_GFX3D_A_CLK_SRC]	= &msm8974_gfx3d_a_clk_src,
>> @@ -645,14 +650,14 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8974 = {
>>   static struct clk_smd_rpm *msm8976_clks[] = {
>>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
>> -	[RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
>> -	[RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
>> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
>> +	[RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>> -	[RPM_SMD_SYSMMNOC_CLK]	= &msm8936_sysmmnoc_clk,
>> -	[RPM_SMD_SYSMMNOC_A_CLK] = &msm8936_sysmmnoc_a_clk,
>> +	[RPM_SMD_SYSMMNOC_CLK]	= &msm8936_bus_2_sysmmnoc_clk,
>> +	[RPM_SMD_SYSMMNOC_A_CLK] = &msm8936_bus_2_sysmmnoc_a_clk,
>>   	[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
>>   	[RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk,
>>   	[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
>> @@ -679,18 +684,18 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8976 = {
>>   static struct clk_smd_rpm *msm8992_clks[] = {
>>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
>> -	[RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
>> -	[RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
>> +	[RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>>   	[RPM_SMD_OCMEMGX_CLK] = &msm8974_ocmemgx_clk,
>>   	[RPM_SMD_OCMEMGX_A_CLK] = &msm8974_ocmemgx_a_clk,
>>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
>> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
>> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
>> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>>   	[RPM_SMD_GFX3D_CLK_SRC] = &msm8974_gfx3d_clk_src,
>>   	[RPM_SMD_GFX3D_A_CLK_SRC] = &msm8974_gfx3d_a_clk_src,
>> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>>   	[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
>>   	[RPM_SMD_BB_CLK1_A] = &msm8916_bb_clk1_a,
>>   	[RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin,
>> @@ -709,8 +714,8 @@ static struct clk_smd_rpm *msm8992_clks[] = {
>>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>>   	[RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>>   	[RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
>> -	[RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk,
>> -	[RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk,
>> +	[RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_bus_3_mmssnoc_ahb_clk,
>> +	[RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_bus_3_mmssnoc_ahb_a_clk,
>>   	[RPM_SMD_MSS_CFG_AHB_CLK] = &msm8992_branch_mss_cfg_ahb_clk,
>>   	[RPM_SMD_MSS_CFG_AHB_A_CLK] = &msm8992_branch_mss_cfg_ahb_a_clk,
>>   	[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
>> @@ -737,18 +742,18 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8992 = {
>>   static struct clk_smd_rpm *msm8994_clks[] = {
>>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
>> -	[RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
>> -	[RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
>> +	[RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>>   	[RPM_SMD_OCMEMGX_CLK] = &msm8974_ocmemgx_clk,
>>   	[RPM_SMD_OCMEMGX_A_CLK] = &msm8974_ocmemgx_a_clk,
>>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
>> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
>> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
>> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>>   	[RPM_SMD_GFX3D_CLK_SRC] = &msm8974_gfx3d_clk_src,
>>   	[RPM_SMD_GFX3D_A_CLK_SRC] = &msm8974_gfx3d_a_clk_src,
>> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>>   	[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
>>   	[RPM_SMD_BB_CLK1_A] = &msm8916_bb_clk1_a,
>>   	[RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin,
>> @@ -767,8 +772,8 @@ static struct clk_smd_rpm *msm8994_clks[] = {
>>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>>   	[RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
>>   	[RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
>> -	[RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk,
>> -	[RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk,
>> +	[RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_bus_3_mmssnoc_ahb_clk,
>> +	[RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_bus_3_mmssnoc_ahb_a_clk,
>>   	[RPM_SMD_MSS_CFG_AHB_CLK] = &msm8992_branch_mss_cfg_ahb_clk,
>>   	[RPM_SMD_MSS_CFG_AHB_A_CLK] = &msm8992_branch_mss_cfg_ahb_a_clk,
>>   	[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
>> @@ -795,12 +800,12 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8994 = {
>>   };
>>     static struct clk_smd_rpm *msm8996_clks[] = {
>> -	[RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
>> -	[RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
>> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
>> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
>> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
>> +	[RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
>> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>>   	[RPM_SMD_MMAXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk,
>> @@ -849,10 +854,10 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8996 = {
>>   static struct clk_smd_rpm *qcs404_clks[] = {
>>   	[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
>>   	[RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk,
>> -	[RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
>> -	[RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
>> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
>> +	[RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>>   	[RPM_SMD_BIMC_GPU_CLK] = &qcs404_bimc_gpu_clk,
>> @@ -879,12 +884,12 @@ static struct clk_smd_rpm *msm8998_clks[] = {
>>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
>>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>> -	[RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
>> -	[RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
>> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
>> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
>> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
>> +	[RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
>> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>>   	[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
>> @@ -937,12 +942,12 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8998 = {
>>   static struct clk_smd_rpm *sdm660_clks[] = {
>>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
>> -	[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
>> -	[RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
>> -	[RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
>> -	[RPM_SMD_CNOC_PERIPH_CLK] = &msm8916_pcnoc_clk,
>> -	[RPM_SMD_CNOC_PERIPH_A_CLK] = &msm8916_pcnoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
>> +	[RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
>> +	[RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
>> +	[RPM_SMD_CNOC_PERIPH_CLK] = &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_CNOC_PERIPH_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>>   	[RPM_SMD_MMSSNOC_AXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk,
>> @@ -983,8 +988,8 @@ static const struct rpm_smd_clk_desc rpm_clk_sdm660 = {
>>   static struct clk_smd_rpm *mdm9607_clks[] = {
>>   	[RPM_SMD_XO_CLK_SRC]		= &sdm660_branch_bi_tcxo,
>>   	[RPM_SMD_XO_A_CLK_SRC]		= &sdm660_branch_bi_tcxo_a,
>> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
>> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
>> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>>   	[RPM_SMD_QPIC_CLK]		= &qcs404_qpic_clk,
>> @@ -1005,16 +1010,16 @@ static const struct rpm_smd_clk_desc rpm_clk_mdm9607 = {
>>   static struct clk_smd_rpm *msm8953_clks[] = {
>>   	[RPM_SMD_XO_CLK_SRC]		= &sdm660_branch_bi_tcxo,
>>   	[RPM_SMD_XO_A_CLK_SRC]		= &sdm660_branch_bi_tcxo_a,
>> -	[RPM_SMD_PCNOC_CLK]		= &msm8916_pcnoc_clk,
>> -	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_pcnoc_a_clk,
>> -	[RPM_SMD_SNOC_CLK]		= &msm8916_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK]		= &msm8916_snoc_a_clk,
>> +	[RPM_SMD_PCNOC_CLK]		= &msm8916_bus_0_pcnoc_clk,
>> +	[RPM_SMD_PCNOC_A_CLK]		= &msm8916_bus_0_pcnoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK]		= &msm8916_bus_1_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK]		= &msm8916_bus_1_snoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK]		= &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK]		= &msm8916_bimc_a_clk,
>>   	[RPM_SMD_IPA_CLK]		= &msm8976_ipa_clk,
>>   	[RPM_SMD_IPA_A_CLK]		= &msm8976_ipa_a_clk,
>> -	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_sysmmnoc_clk,
>> -	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_sysmmnoc_a_clk,
>> +	[RPM_SMD_SYSMMNOC_CLK]		= &msm8936_bus_2_sysmmnoc_clk,
>> +	[RPM_SMD_SYSMMNOC_A_CLK]	= &msm8936_bus_2_sysmmnoc_a_clk,
>>   	[RPM_SMD_QDSS_CLK]		= &msm8916_qdss_clk,
>>   	[RPM_SMD_QDSS_A_CLK]		= &msm8916_qdss_a_clk,
>>   	[RPM_SMD_BB_CLK1]		= &msm8916_bb_clk1,
>> @@ -1041,8 +1046,8 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8953 = {
>>   static struct clk_smd_rpm *sm6125_clks[] = {
>>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
>> -	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>>   	[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
>> @@ -1051,8 +1056,8 @@ static struct clk_smd_rpm *sm6125_clks[] = {
>>   	[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
>>   	[RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,
>>   	[RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,
>> -	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
>> -	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
>> +	[RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
>> +	[RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
>>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>> @@ -1069,10 +1074,10 @@ static struct clk_smd_rpm *sm6125_clks[] = {
>>   	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
>>   	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
>>   	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
>> -	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
>> -	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
>> -	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
>> -	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
>> +	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
>> +	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
>> +	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
>> +	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
>>   };
>>     static const struct rpm_smd_clk_desc rpm_clk_sm6125 = {
>> @@ -1084,8 +1089,8 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6125 = {
>>   static struct clk_smd_rpm *sm6115_clks[] = {
>>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
>> -	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>>   	[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
>> @@ -1094,8 +1099,8 @@ static struct clk_smd_rpm *sm6115_clks[] = {
>>   	[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
>>   	[RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,
>>   	[RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,
>> -	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
>> -	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
>> +	[RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
>> +	[RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
>>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>> @@ -1106,10 +1111,10 @@ static struct clk_smd_rpm *sm6115_clks[] = {
>>   	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
>>   	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
>>   	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
>> -	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
>> -	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
>> -	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
>> -	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
>> +	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
>> +	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
>> +	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
>> +	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
>>   	[RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin,
>>   	[RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin,
>>   	[RPM_SMD_RF_CLK2_PIN] = &msm8916_rf_clk2_pin,
>> @@ -1124,14 +1129,14 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6115 = {
>>   static struct clk_smd_rpm *sm6375_clks[] = {
>>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
>> -	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>>   	[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
>>   	[RPM_SMD_QDSS_A_CLK] = &sm6125_branch_qdss_a_clk,
>> -	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
>> -	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
>> +	[RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
>> +	[RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
>>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>>   	[RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
>> @@ -1140,10 +1145,10 @@ static struct clk_smd_rpm *sm6375_clks[] = {
>>   	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
>>   	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
>>   	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
>> -	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
>> -	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
>> -	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
>> -	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
>> +	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
>> +	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
>> +	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
>> +	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
>>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>>   	[RPM_SMD_HWKM_CLK] = &qcm2290_hwkm_clk,
>> @@ -1161,8 +1166,8 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6375 = {
>>   static struct clk_smd_rpm *qcm2290_clks[] = {
>>   	[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
>>   	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
>> -	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
>> -	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
>> +	[RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
>> +	[RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
>>   	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
>>   	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
>>   	[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
>> @@ -1171,8 +1176,8 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
>>   	[RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
>>   	[RPM_SMD_RF_CLK3] = &qcm2290_38m4_rf_clk3,
>>   	[RPM_SMD_RF_CLK3_A] = &qcm2290_38m4_rf_clk3_a,
>> -	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
>> -	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
>> +	[RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
>> +	[RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
>>   	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
>>   	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
>>   	[RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
>> @@ -1181,10 +1186,10 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
>>   	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
>>   	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
>>   	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
>> -	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
>> -	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
>> -	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
>> -	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
>> +	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
>> +	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
>> +	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
>> +	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
>>   	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
>>   	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
>>   	[RPM_SMD_QPIC_CLK] = &qcs404_qpic_clk,
>

Dmitry Baryshkov Dec. 6, 2022, 11:18 p.m. UTC | #19

On 05/12/2022 19:04, Alex Elder wrote:
> On 12/3/22 11:57 AM, Dmitry Baryshkov wrote:
>> Reuse qcs404's QPIC and BIMC_GPU clock for qcm2290.
>>
>> Fixes: 78b727d02815 ("clk: qcom: smd-rpm: Add QCM2290 RPM clock support")
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> 
> I'm not going to comment on the "Fixes" tag on this or any of the
> later patches in this series.
> 
> Shouldn't this line be removed too?
> 
> DEFINE_CLK_SMD_RPM(qcm2290, bimc_gpu_clk, bimc_gpu_a_clk,
>                     QCOM_SMD_RPM_MEM_CLK, 2);

Nice catch, I'll drop it.

> 
>                      -Alex
>

Dmitry Baryshkov Dec. 6, 2022, 11:30 p.m. UTC | #20

On 05/12/2022 19:05, Alex Elder wrote:
> On 12/3/22 11:58 AM, Dmitry Baryshkov wrote:
>> Remove the duplication between the names of the normal and active-only
>> XO_BUFFER and XO_BUFFER_PINCTRL clocks by using preprocessor logic to
>> add _a suffix.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> 
> This is nice.  See two comments below.
> 
> Reviewed-by: Alex Elder <elder@linaro.org>
> 
>> ---
>>   drivers/clk/qcom/clk-smd-rpm.c | 54 +++++++++++++++++-----------------
>>   1 file changed, 27 insertions(+), 27 deletions(-)
>>
>> diff --git a/drivers/clk/qcom/clk-smd-rpm.c 
>> b/drivers/clk/qcom/clk-smd-rpm.c
>> index cb47d69889fb..9f33dbd60e96 100644
>> --- a/drivers/clk/qcom/clk-smd-rpm.c
>> +++ b/drivers/clk/qcom/clk-smd-rpm.c
>> @@ -112,17 +112,17 @@
>>           __DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id,   \
>>           QCOM_RPM_SMD_KEY_STATE)
>> -#define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, _active, r_id, 
>> r)      \
>> -        __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, 
>> _active,          \
>> +#define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, r_id, 
>> r)              \
>> +        __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _name##_a,      \
>>           QCOM_SMD_RPM_CLK_BUF_A, r_id, r,                  \
>>           QCOM_RPM_KEY_SOFTWARE_ENABLE)
>> -#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name, 
>> _active,          \
>> +#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, 
>> _name,              \
>>                            r_id, r)                  \
> 
> Can the above line be merged with its predecessor?
> 
> (I now have looked at later patches, and I see you add a new argument
> that makes this original alignment still make sense.  If that's why
> you didn't here, you've done the right thing.)

Let's fix it in this patch, to remove possible questions.

> 
>> -        DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, 
>> _active,          \
>> +        DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name,              \
>>                            r_id, r);                  \
> 
> Same comment here.
>

[00/16] clk: qcom: smd-rpm: drop platform names

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