| Message ID | 20221216215819.1164973-1-marijn.suijten@somainline.org |
|---|---|
| Headers | show |
| Series | arm64: dts: qcom: sm6125: Enable APPS SMMU | expand |
On 16.12.2022 22:58, Marijn Suijten wrote: > From: Martin Botka <martin.botka@somainline.org> > > Add a node for the APPS SMMU, to which various devices such as USB and > storage nodes are connected. > > Signed-off-by: Martin Botka <martin.botka@somainline.org> > [Marijn: add the new, generic, "qcom,smmu-500" compatible, add patch > description, reorder # properties] > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sm6125.dtsi | 73 ++++++++++++++++++++++++++++ > 1 file changed, 73 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi > index bf9e8d45ee44..347665c2067c 100644 > --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi > @@ -573,6 +573,79 @@ spmi_bus: spmi@1c40000 { > cell-index = <0>; > }; > > + apps_smmu: iommu@c600000 { > + compatible = "qcom,sm6125-smmu-500", "qcom,smmu-500", "arm,mmu-500"; > + reg = <0xc600000 0x80000>; > + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; > + > + #global-interrupts = <1>; > + #iommu-cells = <2>; > + }; > + > apcs_glb: mailbox@f111000 { > compatible = "qcom,sm6125-apcs-hmss-global"; > reg = <0x0f111000 0x1000>;
On 16.12.2022 22:58, Marijn Suijten wrote: > From: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> > > Add an IOMMU context to the USB DWC3 controller, required to get USB > functionality upon enablement of apps_smmu. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sm6125.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi > index f560499cc0ca..a205121ab4a7 100644 > --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi > @@ -542,6 +542,7 @@ usb3_dwc3: usb@4e00000 { > compatible = "snps,dwc3"; > reg = <0x04e00000 0xcd00>; > interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; > + iommus = <&apps_smmu 0x100 0x0>; > phys = <&hsusb_phy1>; > phy-names = "usb2-phy"; > snps,dis_u2_susphy_quirk;
Add APPS SMMU to SM6125 dtsi and use it in SDHCI/USB nodes. Changes since v3: - Drop driver patch in favour of using generic qcom,smmu-500 compatible; - Add patches that use apps_smmu in USB and SDHCI nodes, reconfiguring their streamID which otherwise gets lost (from the bootloader) as soon as SMMU probes, breaking their functionality; - Rebased on next-20221216 to solve dt-bindings conflict. v3: https://lore.kernel.org/linux-iommu/20210612094606.89576-2-martin.botka@somainline.org/T/#u AngeloGioacchino Del Regno (1): arm64: dts: qcom: sm6125: Add IOMMU context to DWC3 Marijn Suijten (1): arm64: dts: qcom: sm6125: Add apps_smmu with streamID to SDHCI 1/2 nodes Martin Botka (2): dt-bindings: arm-smmu: Document smmu-500 binding for SM6125 arm64: dts: qcom: sm6125: Configure APPS SMMU .../devicetree/bindings/iommu/arm,smmu.yaml | 1 + arch/arm64/boot/dts/qcom/sm6125.dtsi | 76 +++++++++++++++++++ 2 files changed, 77 insertions(+) -- 2.39.0