[0/6] SM6(11|12|37)5 GPUCC

Message ID	20230126144033.216206-1-konrad.dybcio@linaro.org
Headers	show Return-Path: <linux-arm-msm-owner@vger.kernel.org> From: Konrad Dybcio <konrad.dybcio@linaro.org> To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio <konrad.dybcio@linaro.org> Subject: [PATCH 0/6] SM6(11\|12\|37)5 GPUCC Date: Thu, 26 Jan 2023 15:40:27 +0100 Message-Id: <20230126144033.216206-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	SM6(11\|12\|37)5 GPUCC \| expand [0/6] SM6(11\|12\|37)5 GPUCC [1/6] dt-bindings: clock: Add Qcom SM6125 GPUCC [2/6] clk: qcom: Add GPU clock controller driver for SM6125 [3/6] dt-bindings: clock: Add Qcom SM6375 GPUCC [4/6] clk: qcom: Add GPU clock controller driver for SM6375 [5/6] dt-bindings: clock: Add Qcom SM6115 GPUCC [6/6] clk: qcom: Add GPU clock controller driver for SM6115

Message ID

20230126144033.216206-1-konrad.dybcio@linaro.org

Headers

From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: linux-arm-msm@vger.kernel.org, andersson@kernel.org,
        agross@kernel.org, krzysztof.kozlowski@linaro.org
Cc: marijn.suijten@somainline.org,
        Konrad Dybcio <konrad.dybcio@linaro.org>
Subject: [PATCH 0/6] SM6(11|12|37)5 GPUCC
Date: Thu, 26 Jan 2023 15:40:27 +0100
Message-Id: <20230126144033.216206-1-konrad.dybcio@linaro.org>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Series

SM6(11|12|37)5 GPUCC | expand

Message

Konrad Dybcio Jan. 26, 2023, 2:40 p.m. UTC

This series brings GPUCC support and the correlated bindings for
three midrange SoCs, all of which host a GMU-less A6xx GPU.

Konrad Dybcio (6):
  dt-bindings: clock: Add Qcom SM6125 GPUCC
  clk: qcom: Add GPU clock controller driver for SM6125
  dt-bindings: clock: Add Qcom SM6375 GPUCC
  clk: qcom: Add GPU clock controller driver for SM6375
  dt-bindings: clock: Add Qcom SM6115 GPUCC
  clk: qcom: Add GPU clock controller driver for SM6115

 .../bindings/clock/qcom,sm6115-gpucc.yaml     |  71 +++
 .../bindings/clock/qcom,sm6125-gpucc.yaml     |  64 +++
 .../bindings/clock/qcom,sm6375-gpucc.yaml     |  60 ++
 drivers/clk/qcom/Kconfig                      |  24 +
 drivers/clk/qcom/Makefile                     |   3 +
 drivers/clk/qcom/gpucc-sm6115.c               | 523 ++++++++++++++++++
 drivers/clk/qcom/gpucc-sm6125.c               | 444 +++++++++++++++
 drivers/clk/qcom/gpucc-sm6375.c               | 480 ++++++++++++++++
 include/dt-bindings/clock/qcom,sm6115-gpucc.h |  36 ++
 include/dt-bindings/clock/qcom,sm6125-gpucc.h |  31 ++
 include/dt-bindings/clock/qcom,sm6375-gpucc.h |  36 ++
 11 files changed, 1772 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml
 create mode 100644 drivers/clk/qcom/gpucc-sm6115.c
 create mode 100644 drivers/clk/qcom/gpucc-sm6125.c
 create mode 100644 drivers/clk/qcom/gpucc-sm6375.c
 create mode 100644 include/dt-bindings/clock/qcom,sm6115-gpucc.h
 create mode 100644 include/dt-bindings/clock/qcom,sm6125-gpucc.h
 create mode 100644 include/dt-bindings/clock/qcom,sm6375-gpucc.h