| Message ID | 20230208183755.2907771-1-vladimir.zapolskiy@linaro.org |
|---|---|
| Headers | show |
| Series | crypto: qcom-qce: Add YAML bindings & support for newer SoCs | expand |
On 08/02/2023 19:37, Vladimir Zapolskiy wrote: > Change the old deprecated compatible name to a new one, which is specific > to IPQ4019 SoC. > Your changeset is not bisectable, but that's expected. What is expected is to explicitly say in commit msg, that DTS patches must be taken in next cycle. This patch must wait as it breaks all in-tree and out-of-tree users. Also location of this patch in the patchset is not correct - cannot be taken before the drivers. Best regards, Krzysztof
On 08/02/2023 19:37, Vladimir Zapolskiy wrote: > Change the old deprecated compatible name of QCE IP on MSM8996 to new ones > based on SoC name. > > Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> > --- Same dependency comment. Best regards, Krzysztof
Hi Vladimir, On 2/9/23 12:07 AM, Vladimir Zapolskiy wrote: > Add description of QCE and its corresponding BAM DMA IPs on SM8250 SoC. > > Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm8250.dtsi | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi > index e59c16f74d17..d8698d18223e 100644 > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi > @@ -2215,6 +2215,30 @@ ufs_mem_phy_lanes: phy@1d87400 { > }; > }; > > + cryptobam: dma-controller@1dc4000 { > + compatible = "qcom,bam-v1.7.0"; > + reg = <0x0 0x01dc4000 0x0 0x24000>; > + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; > + #dma-cells = <1>; > + qcom,ee = <0>; > + qcom,controlled-remotely; > + num-channels = <8>; > + qcom,num-ees = <2>; > + iommus = <&apps_smmu 0x586 0x11>, > + <&apps_smmu 0x596 0x11>; > + }; > + > + crypto: crypto@1dfa000 { > + compatible = "qcom,sm8250-qce", "qcom,sm8150-qce"; > + reg = <0x0 0x01dfa000 0x0 0x6000>; > + dmas = <&cryptobam 6>, <&cryptobam 7>; > + dma-names = "rx", "tx"; > + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>; > + interconnect-names = "memory"; > + iommus = <&apps_smmu 0x586 0x11>, > + <&apps_smmu 0x596 0x11>; > + }; > + > tcsr_mutex: hwlock@1f40000 { > compatible = "qcom,tcsr-mutex"; > reg = <0x0 0x01f40000 0x0 0x40000>; This patch was part of the v7 arm64 dts fixes I sent out - see [1]. Probably you can use it as a base and make the changes (interconnect property for the BAM DMA node and qce-compatible names) directly there and include it in your patch series. [1]. https://lore.kernel.org/linux-arm-msm/20220921045602.1462007-3-bhupesh.sharma@linaro.org/ Thanks, Bhupesh
Hi Bhupesh, On 2/9/23 14:21, Bhupesh Sharma wrote: > Hi Vladimir, > > On 2/9/23 12:07 AM, Vladimir Zapolskiy wrote: >> Add description of QCE and its corresponding BAM DMA IPs on SM8250 SoC. >> >> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> >> --- >> arch/arm64/boot/dts/qcom/sm8250.dtsi | 24 ++++++++++++++++++++++++ >> 1 file changed, 24 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi >> index e59c16f74d17..d8698d18223e 100644 >> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi >> @@ -2215,6 +2215,30 @@ ufs_mem_phy_lanes: phy@1d87400 { >> }; >> }; >> >> + cryptobam: dma-controller@1dc4000 { >> + compatible = "qcom,bam-v1.7.0"; >> + reg = <0x0 0x01dc4000 0x0 0x24000>; >> + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; >> + #dma-cells = <1>; >> + qcom,ee = <0>; >> + qcom,controlled-remotely; >> + num-channels = <8>; >> + qcom,num-ees = <2>; >> + iommus = <&apps_smmu 0x586 0x11>, >> + <&apps_smmu 0x596 0x11>; >> + }; >> + >> + crypto: crypto@1dfa000 { >> + compatible = "qcom,sm8250-qce", "qcom,sm8150-qce"; >> + reg = <0x0 0x01dfa000 0x0 0x6000>; >> + dmas = <&cryptobam 6>, <&cryptobam 7>; >> + dma-names = "rx", "tx"; >> + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>; >> + interconnect-names = "memory"; >> + iommus = <&apps_smmu 0x586 0x11>, >> + <&apps_smmu 0x596 0x11>; >> + }; >> + >> tcsr_mutex: hwlock@1f40000 { >> compatible = "qcom,tcsr-mutex"; >> reg = <0x0 0x01f40000 0x0 0x40000>; > > This patch was part of the v7 arm64 dts fixes I sent out - see [1]. thank you for pointing it out, so there are two different v7 series of related patches, as it's stated in the cover letter I based my v8 on top of linux-crypto changes [*], and this particular change was developed independently from yours. And so, there are some differences, can you please comment on them? - My change does not have 'interconnects' property under dma-controller@1dc4000 device tree node, I believe it is not needed, but please correct me here. - My change uses DMA channel number taken from the downstream code [**], is there a reason to use different ones like in your change? - My change has a shorter list of IOMMUs also copied from the same downstream code, is there a reason to use a different extended list like in your change? - On my end I have to retest your change without 'num-channels' and 'qcom,num-ees' properties, since this also seems as an important difference between two patches. Nevertheless, thank you again for bringing my attention to a different patch series, I'll reuse the changes from it, and also publish all of them together and in a separate changeset as Krzysztof suggested. > Probably you can use it as a base and make the changes (interconnect > property for the BAM DMA node and qce-compatible names) directly there > and include it in your patch series. [*] https://lore.kernel.org/linux-arm-msm/20220920114051.1116441-1-bhupesh.sharma@linaro.org/ [**] https://source.codeaurora.org/quic/la/kernel/msm-4.19/tree/arch/arm64/boot/dts/qcom/kona.dtsi?h=LA.UM.8.12.3.1&id=f3dd4aaeb34438c877ccd42f5a48ccd554dd765a#n2979 > [1]. > https://lore.kernel.org/linux-arm-msm/20220921045602.1462007-3-bhupesh.sharma@linaro.org/ -- Best wishes, Vladimir
The series contains Qualcomm Crypto Engine dts and driver changes, which modify a set of accepted compatible property values, this is needed to provide a unified and fine-grained support of the driver on old and new platforms. In addition due to QCE IP changes on new Qualcomm platforms, it is reflected in updates to valid device tree properties, namely added iommu, interconnects and optional clocks. Changes since v8: ================= - v8 can be found here: https://lore.kernel.org/all/20230202135036.2635376-1-vladimir.zapolskiy@linaro.org/ - Rebased the series on top of linux-next, sm8550 qce support is already found in the tree, - Reduced the list of QCE IP compatibles in the driver, added one more compatible for backward DTB ABI compatibility, - Replaced a documentation change from Neil Armstrong by a more advanced version of it per review comments from Krzysztof Kozlowski about clock and clock-names properties, - Added changes to all relevant Qualcomm platform dtsi files according to the changes in the scheme file, - Added QCE support on SM8250 platform. Changes since v7: ================= - v7 can be found here: https://lore.kernel.org/linux-arm-msm/20220920114051.1116441-1-bhupesh.sharma@linaro.org - Added a change by Neil Armstrong to document clocks and clock-names properties as optional, - At the moment do not add Bhupesh as a new QCE driver maintainer, - Minor updates to device tree binding documentation and qce driver, in particular added more compatibles and fixed lesser issues. Changes since v6: ================= - v6 can be seen here: https://lore.kernel.org/linux-arm-msm/30756e6f-952f-ccf2-b493-e515ba4f0a64@linaro.org/ - As per Krzysztof's suggestion on v6, clubbed the crypto driver and dt-bindings changes together. Now the overall v5 patchset into 3 separate patchsets, one each for the following areas to allow easier review and handling from the maintainer: arm-msm, crypto and dma Changes since v5: ================= - v5 can be seen here: https://lore.kernel.org/lkml/20211110105922.217895-1-bhupesh.sharma@linaro.org/ - As per Bjorn's suggestion on irc, broke down the patchset into 4 separate patchsets, one each for the following areas to allow easier review and handling from the maintainer: arm-msm, crypto, dma and devicetree - Addressed Rob's, Vladimir's and Bjorn's review comments received on v5. - Added Tested-by from Jordan received on the v5. Changes since v4: ================= - v4 for sm8250 can be seen here: https://lore.kernel.org/linux-arm-msm/20211013105541.68045-1-bhupesh.sharma@linaro.org/ - v1 for sm8150 qce enablement can be seen here: https://lore.kernel.org/linux-arm-msm/20211013165823.88123-1-bhupesh.sharma@linaro.org/ - Merged the sm8150 and sm8250 enablement patches in the same patchset, as per suggestions from Bjorn. - Dropped a couple of patches from v4, as these have been picked by Bjorn already via his tree. - Addressed review comments from Vladimir, Thara and Rob. - Collect Reviewed-by from Rob and Thara on some of the patches from the v4 patchset. Changes since v3: ================= - v3 can be seen here: https://lore.kernel.org/linux-arm-msm/20210519143700.27392-1-bhupesh.sharma@linaro.org/ - Dropped a couple of patches from v3, on basis of the review comments: ~ [PATCH 13/17] crypto: qce: core: Make clocks optional ~ [PATCH 15/17] crypto: qce: Convert the device found dev_dbg() to dev_info() - Addressed review comments from Thara, Rob and Stephan Gerhold. - Collect Reviewed-by from Rob and Thara on some of the patches from the v3 patchset. Changes since v2: ================= - v2 can be seen here: https://lore.kernel.org/dmaengine/20210505213731.538612-1-bhupesh.sharma@linaro.org/ - Drop a couple of patches from v1, which tried to address the defered probing of qce driver in case bam dma driver is not yet probed. Replace it instead with a single (simpler) patch [PATCH 16/17]. - Convert bam dma and qce crypto dt-bindings to YAML. - Addressed review comments from Thara, Bjorn, Vinod and Rob. Changes since v1: ================= - v1 can be seen here: https://lore.kernel.org/linux-arm-msm/20210310052503.3618486-1-bhupesh.sharma@linaro.org/ - v1 did not work well as reported earlier by Dmitry, so v2 contains the following changes/fixes: ~ Enable the interconnect path b/w BAM DMA and main memory first before trying to access the BAM DMA registers. ~ Enable the interconnect path b/w qce crytpo and main memory first before trying to access the qce crypto registers. ~ Make sure to document the required and optional properties for both BAM DMA and qce crypto drivers. ~ Add a few debug related print messages in case the qce crypto driver passes or fails to probe. ~ Convert the qce crypto driver probe to a defered one in case the BAM DMA or the interconnect driver(s) (needed on specific Qualcomm parts) are not yet probed. Qualcomm crypto engine (qce) is available on several Snapdragon SoCs. The qce block supports hardware accelerated algorithms for encryption and authentication. It also provides support for aes, des, 3des encryption algorithms and sha1, sha256, hmac(sha1), hmac(sha256) authentication algorithms. Bhupesh Sharma (4): dt-bindings: qcom-qce: Convert bindings to yaml MAINTAINERS: Add qcom-qce dt-binding file to QUALCOMM CRYPTO DRIVERS section dt-bindings: qcom-qce: Add 'interconnects' and 'interconnect-names' dt-bindings: qcom-qce: Add 'iommus' to optional properties Thara Gopinath (2): crypto: qce: core: Add support to initialize interconnect path crypto: qce: core: Make clocks optional Vladimir Zapolskiy (8): dt-bindings: qcom-qce: Add new SoC compatible strings for qcom-qce dt-bindings: qcom-qce: document optional clocks and clock-names properties arm: dts: qcom: ipq4019: update a compatible for QCE IP on IPQ4019 SoC arm64: dts: qcom: msm8996: update QCE compatible according to a new scheme arm64: dts: qcom: sdm845: update QCE compatible according to a new scheme arm64: dts: qcom: sm8550: add a family compatible for QCE IP arm64: dts: qcom: sm8250: add description of Qualcomm Crypto Engine IP crypto: qce: core: Add a compatible based on a SoC name .../devicetree/bindings/crypto/qcom-qce.txt | 25 ---- .../devicetree/bindings/crypto/qcom-qce.yaml | 116 ++++++++++++++++++ MAINTAINERS | 1 + arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 24 ++++ arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- drivers/crypto/qce/core.c | 24 +++- drivers/crypto/qce/core.h | 1 + 10 files changed, 166 insertions(+), 33 deletions(-) delete mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.txt create mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.yaml