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[83.9.29.26]) by smtp.gmail.com with ESMTPSA id s9-20020a2e9c09000000b002b6995f38a2sm4946224lji.100.2023.07.03.11.20.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 11:20:09 -0700 (PDT) From: Konrad Dybcio Subject: [PATCH v2 0/8] MSM8998 clk cleanups and fixups Date: Mon, 03 Jul 2023 20:20:04 +0200 Message-Id: <20230622-topic-8998clk-v2-0-6222fbc2916b@linaro.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAFQRo2QC/3WNwQ6DIBAFf8Vw7jaArUJP/Y/GA+CqmxIwYE0b4 7+Xeu9xJnlvNpYxEWZ2qzaWcKVMMRSQp4q5yYQRgfrCTHJZ80ZKWOJMDpTWyvknXGrRatUMNee KlY01GcEmE9xUVuHlfZFzwoHeR+TRFZ4oLzF9juYqfvbf/SqAw9W2hvcNamXF3VMwKZ5jGlm37 /sXqei9+8AAAAA= To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Krzysztof Kozlowski , Rob Herring X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688408407; l=1720; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=phlPM9Cc876D80OS9Sc/anPCogRjxlTnuuGA5rJzqPI=; b=7dmYnDCVVvlGri8VIWKTTOkbE9P5gWVFlLT8wuUmBrmzdbLf5oD70Fg+iauFZMgQz+tdBHbiu RIbMXQauebHDezcAG0E87N7GJs3nlC2z11esmEwvb5TPh9dEDmMlAAx X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The MSM8998 clock controller drivers have some rough edges around whether and how Linux should touch them, which this series tries to sand down a bit. MSM8998 maple seems not to explode, please give it a spin on your boards. Signed-off-by: Konrad Dybcio --- Changes in v2: - Pick up tags (thanks a lot Jeffrey for testing) - Drop patch "Don't poke at some BIMC GPU clocks" - Link to v1: https://lore.kernel.org/r/20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org --- Konrad Dybcio (8): dt-bindings: clk: qcom,gcc-msm8998: Add missing GPU/MMSS GPLL0 legs dt-bindings: clock: qcom,mmcc: Add GPLL0_DIV for MSM8998 clk: qcom: gcc-msm8998: Control MMSS and GPUSS GPLL0 outputs properly clk: qcom: mmcc-msm8998: Properly consume GPLL0 inputs clk: qcom: gpucc-msm8998: Use the correct GPLL0 leg with old DTs clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks arm64: dts: qcom: msm8998: Use the correct GPLL0 leg for GPUCC arm64: dts: qcom: msm8998: Use the correct GPLL0_DIV leg for MMCC .../devicetree/bindings/clock/qcom,mmcc.yaml | 2 + arch/arm64/boot/dts/qcom/msm8998.dtsi | 8 ++- drivers/clk/qcom/gcc-msm8998.c | 64 +++++++++++++++++++++- drivers/clk/qcom/gpucc-msm8998.c | 2 +- drivers/clk/qcom/mmcc-msm8998.c | 35 +++--------- include/dt-bindings/clock/qcom,gcc-msm8998.h | 3 + 6 files changed, 80 insertions(+), 34 deletions(-) --- base-commit: 296d53d8f84ce50ffaee7d575487058c8d437335 change-id: 20230622-topic-8998clk-4317986f3008 Best regards,