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[v2,00/13] phy: qcom-qmp-pcie: convert to newer style of bindings

Message ID 20230731105759.3997549-1-dmitry.baryshkov@linaro.org
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Series phy: qcom-qmp-pcie: convert to newer style of bindings | expand

Message

Dmitry Baryshkov July 31, 2023, 10:57 a.m. UTC
Reviewing several patchsets for newer platforms made it clear that
having two styles of QMP PHY bindings causes confusion. Despite binding
documents having notes telling that old bindings should be used for
older platforms, it is too easy to attempt adding new platform with
older QMP PHY binding. Thus let's have just a single documented style of
bindings.

Proposed merge strategy: immutable branch with binding and PHY patches,
which can also be merged into Bjorn's dts-for-6.6

Changes since v1:
 - Split large patchset into smaller parts
 - Rebased on phy/next

Dmitry Baryshkov (13):
  dt-bindings: phy: migrate QMP PCIe PHY bindings to
    qcom,sc8280xp-qmp-pcie-phy.yaml
  phy: qcom-qmp-pcie: simplify clock handling
  phy: qcom-qmp-pcie: populate offsets configuration
  arm64: dts: qcom: ipq6018: switch PCIe QMP PHY to new style of
    bindings
  arm64: dts: qcom: ipq8074: switch PCIe QMP PHY to new style of
    bindings
  arm64: dts: qcom: msm8998: switch PCIe QMP PHY to new style of
    bindings
  arm64: dts: qcom: sc7280: switch PCIe QMP PHY to new style of bindings
  arm64: dts: qcom: sc8180x: switch PCIe QMP PHY to new style of
    bindings
  arm64: dts: qcom: sdm845: switch PCIe QMP PHY to new style of bindings
  arm64: dts: qcom: sm8150: switch PCIe QMP PHY to new style of bindings
  arm64: dts: qcom: sm8250: switch PCIe QMP PHY to new style of bindings
  arm64: dts: qcom: sm8450: switch PCIe QMP PHY to new style of bindings
  ARM: dts: qcom-sdx55: switch PCIe QMP PHY to new style of bindings

 .../phy/qcom,ipq8074-qmp-pcie-phy.yaml        | 278 +++---------------
 .../phy/qcom,msm8998-qmp-pcie-phy.yaml        |  97 ++++++
 .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml       |  34 ++-
 arch/arm/boot/dts/qcom/qcom-sdx55.dtsi        |  31 +-
 arch/arm64/boot/dts/qcom/ipq6018.dtsi         |  32 +-
 arch/arm64/boot/dts/qcom/ipq8074.dtsi         |  63 ++--
 arch/arm64/boot/dts/qcom/msm8998.dtsi         |  30 +-
 arch/arm64/boot/dts/qcom/sc7280.dtsi          |  36 +--
 arch/arm64/boot/dts/qcom/sc8180x.dtsi         | 140 ++++-----
 arch/arm64/boot/dts/qcom/sdm845.dtsi          |  71 ++---
 arch/arm64/boot/dts/qcom/sm8150.dtsi          |  70 ++---
 arch/arm64/boot/dts/qcom/sm8250.dtsi          | 112 +++----
 arch/arm64/boot/dts/qcom/sm8450.dtsi          |  82 +++---
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c      | 162 +++++-----
 14 files changed, 520 insertions(+), 718 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-pcie-phy.yaml

Comments

Konrad Dybcio July 31, 2023, 12:56 p.m. UTC | #1
On 31.07.2023 12:57, Dmitry Baryshkov wrote:
> For some of existing PHYs for new binding we are going to change refgen
> to more correct "rchng". Rather than introducing additional code
> to handle legacy vs current bindings (and clock names), use
> devm_clk_bulk_get_optional().
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Nice!

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Konrad Dybcio July 31, 2023, 7:22 p.m. UTC | #2
On 31.07.2023 12:57, Dmitry Baryshkov wrote:
> Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single
> resource region, no per-PHY subnodes).
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 63 +++++++++++----------------
>  1 file changed, 26 insertions(+), 37 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> index 00ed71936b47..e4447a9d7929 100644
> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> @@ -211,59 +211,48 @@ qusb_phy_0: phy@79000 {
>  
>  		pcie_qmp0: phy@84000 {
>  			compatible = "qcom,ipq8074-qmp-gen3-pcie-phy";
> -			reg = <0x00084000 0x1bc>;
> -			#address-cells = <1>;
> -			#size-cells = <1>;
> -			ranges;
> +			reg = <0x00084000 0x1000>;
>  
>  			clocks = <&gcc GCC_PCIE0_AUX_CLK>,
> -				<&gcc GCC_PCIE0_AHB_CLK>;
> -			clock-names = "aux", "cfg_ahb";
> +				<&gcc GCC_PCIE0_AHB_CLK>,
> +				<&gcc GCC_PCIE0_PIPE_CLK>;
Can you align the clocks entries?

Konrad
Konrad Dybcio July 31, 2023, 7:24 p.m. UTC | #3
On 31.07.2023 12:57, Dmitry Baryshkov wrote:
> Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single
> resource region, no per-PHY subnodes).
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Konrad Dybcio July 31, 2023, 7:28 p.m. UTC | #4
On 31.07.2023 12:57, Dmitry Baryshkov wrote:
> Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single
> resource region, no per-PHY subnodes). As a part of this conversion also
> change the "refgen" name to more correct "rchng".
Usually that's dodgy, but since this commit aligns things with
bindings, I'll allow it.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Vinod Koul Aug. 17, 2023, 9:55 a.m. UTC | #5
On Mon, 31 Jul 2023 13:57:46 +0300, Dmitry Baryshkov wrote:
> Reviewing several patchsets for newer platforms made it clear that
> having two styles of QMP PHY bindings causes confusion. Despite binding
> documents having notes telling that old bindings should be used for
> older platforms, it is too easy to attempt adding new platform with
> older QMP PHY binding. Thus let's have just a single documented style of
> bindings.
> 
> [...]

Applied, thanks!

[01/13] dt-bindings: phy: migrate QMP PCIe PHY bindings to qcom,sc8280xp-qmp-pcie-phy.yaml
        commit: 1c42a5f4e84b217aa44747079aae9ba26c29e328
[02/13] phy: qcom-qmp-pcie: simplify clock handling
        commit: c4b46cdfc9ef4cd003ee52bb0a2b3c43ed26cd60
[03/13] phy: qcom-qmp-pcie: populate offsets configuration
        commit: 64adc0bf06ad5855da5a02b9653fb7cfda289c50

Best regards,