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[V0,0/6] Add driver support for Data Capture and Compare Engine(DCC) for SM8150

Message ID cover.1613541226.git.schowdhu@codeaurora.org
Headers show
Series Add driver support for Data Capture and Compare Engine(DCC) for SM8150 | expand

Message

Souradeep Chowdhury Feb. 17, 2021, 6:48 a.m. UTC
DCC(Data Capture and Compare) is a DMA engine designed for debugging purposes.In case of a system
crash or manual software triggers by the user the DCC hardware stores the value at the register
addresses which can be used for debugging purposes.The DCC driver provides the user with sysfs
interface to configure the register addresses.The options that the DCC hardware provides include
reading from registers,writing to registers,first reading and then writing to registers and looping
through the values of the same register.
In certain cases a register write needs to be executed for
accessing the rest of the registers,also the user might want to recaord the changing values of a
particular register with time for which he has the option to use the loop feature.
The options mentioned above are exposed to the user by sysfs files once the driver is probed.The
details and usage of this sysfs files are documented in Documentation/ABI/testing/sysfs-driver-dcc.
As an example if a user wants to configure to store 100 words starting from address 0x80000050
he should give inputs as following to the sysfs config file:-
echo  0x80000050 100 > /sys/bus/platform/devices/.../config
Similarly if he wants to write to a register using DCC hardware he should give following input to
config_write sysfs file:-
echo 0x80000000 0xFF > /sys/bus/platform/devices/10a2000.dcc/config_write
This will write the value 0xFF on address 0x80000000.
All this read and write occurs at crash time or if the user manually invokes a software trigger.

Souradeep Chowdhury (6):
  dt-bindings: Added the yaml bindings for DCC
  arm64: dts: qcom: sm8150: Add Data Capture and Compare(DCC) support
    node
  soc: qcom: dcc:Add driver support for Data Capture and Compare
    unit(DCC)
  soc: qcom: dcc:Add the sysfs variables to the Data Capture and Compare
    driver(DCC)
  DCC:Added the sysfs entries for DCC(Data Capture and Compare) driver
  MAINTAINERS:Added the entry for DCC(Data Capture and Compare) driver
    support

 Documentation/ABI/testing/sysfs-driver-dcc         |   74 +
 .../devicetree/bindings/arm/msm/qcom,dcc.yaml      |   49 +
 MAINTAINERS                                        |    8 +
 arch/arm64/boot/dts/qcom/sm8150.dtsi               |    7 +
 drivers/soc/qcom/Kconfig                           |    8 +
 drivers/soc/qcom/Makefile                          |    1 +
 drivers/soc/qcom/dcc.c                             | 1574 ++++++++++++++++++++
 7 files changed, 1721 insertions(+)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-dcc
 create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,dcc.yaml
 create mode 100644 drivers/soc/qcom/dcc.c

--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

Comments

Vinod Koul Feb. 17, 2021, 11:03 a.m. UTC | #1
On 17-02-21, 12:18, Souradeep Chowdhury wrote:
> Add the DCC(Data Capture and Compare) device tree node entry along with
> the addresses for register regions.

This should be last patch..

> 
> Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index e5bb17b..3198bd3 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -654,6 +654,13 @@
>  			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
>  		};
>  
> +		dcc@010a2000{

no leading zero here and space before {

> +			compatible = "qcom,sm8150-dcc", "qcom,dcc";
> +			reg = <0x0 0x010a2000 0x0 0x1000>,
> +				<0x0 0x010ad000 0x0 0x3000>;

pls align this to preceding line

> +			reg-names = "dcc-base", "dcc-ram-base";
> +		};
> +
>  		ufs_mem_hc: ufshc@1d84000 {
>  			compatible = "qcom,sm8150-ufshc", "qcom,ufshc",
>  				     "jedec,ufs-2.0";
> -- 
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
Souradeep Chowdhury Feb. 17, 2021, 1:10 p.m. UTC | #2
Hi,

Please find the replies inline.


On 2021-02-17 16:33, Vinod Koul wrote:
> On 17-02-21, 12:18, Souradeep Chowdhury wrote:
>> Add the DCC(Data Capture and Compare) device tree node entry along 
>> with
>> the addresses for register regions.
> 
> This should be last patch..

Ack

> 
>> 
>> Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org>
>> ---
>>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 7 +++++++
>>  1 file changed, 7 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi 
>> b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> index e5bb17b..3198bd3 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> @@ -654,6 +654,13 @@
>>  			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
>>  		};
>> 
>> +		dcc@010a2000{
> 
> no leading zero here and space before {

Ack

> 
>> +			compatible = "qcom,sm8150-dcc", "qcom,dcc";
>> +			reg = <0x0 0x010a2000 0x0 0x1000>,
>> +				<0x0 0x010ad000 0x0 0x3000>;
> 
> pls align this to preceding line

Ack

> 
>> +			reg-names = "dcc-base", "dcc-ram-base";
>> +		};
>> +
>>  		ufs_mem_hc: ufshc@1d84000 {
>>  			compatible = "qcom,sm8150-ufshc", "qcom,ufshc",
>>  				     "jedec,ufs-2.0";
>> --
>> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
>> member
>> of Code Aurora Forum, hosted by The Linux Foundation