From patchwork Fri Sep 11 14:28:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sai Prakash Ranjan X-Patchwork-Id: 292906 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 841E3C433E2 for ; Fri, 11 Sep 2020 15:54:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2844C21D7E for ; Fri, 11 Sep 2020 15:54:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="Mwd4YDDO"; dkim=pass (1024-bit key) header.d=amazonses.com header.i=@amazonses.com header.b="E7At5zbE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726184AbgIKPyS (ORCPT ); Fri, 11 Sep 2020 11:54:18 -0400 Received: from a27-187.smtp-out.us-west-2.amazonses.com ([54.240.27.187]:57942 "EHLO a27-187.smtp-out.us-west-2.amazonses.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726571AbgIKPwm (ORCPT ); Fri, 11 Sep 2020 11:52:42 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/simple; s=gbvhytky6xpx7itkhb67ktsxbiwpnxix; d=codeaurora.org; t=1599834495; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding; bh=orZJUtk8zuXCuyD9M2bu/OIyXLSAJfTBuYp/toele7o=; b=Mwd4YDDO0nVQnAFD1j9E9Z0o9mh2itzhVoX3F5mvCgek00ae/hdmWebKI+eQFWUy 9H6Z47sC5NBSKP5YnQSuWAyFE+9qI0qsYIUNRMYvqna+AtTHvppf+SmJkgCTZiNvX0z eXwoRgrLyfw5E1VseoGQiDZoXCShmTU0+zS3JRCc= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/simple; s=hsbnp7p3ensaochzwyq5wwmceodymuwv; d=amazonses.com; t=1599834495; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Feedback-ID; bh=orZJUtk8zuXCuyD9M2bu/OIyXLSAJfTBuYp/toele7o=; b=E7At5zbEIjtVMf/kXsG1p2FI1kRVZKjdGQkri83MOn4zi08B7IJTiV60TWaJVUMq vVhhdiQN/nSlg95dLE0bpcMiEsmWcAfpZWFHcPN42pO8ukgVic61qpakWTP3ewb/9Ok jk2ZkMU0OqVP7c6mLXbIvI12g1B2+HGQUgV23dF0= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org AEE2AC433A0 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=saiprakash.ranjan@codeaurora.org From: Sai Prakash Ranjan To: Will Deacon , Robin Murphy , Joerg Roedel , Jordan Crouse , Rob Clark Cc: iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Bjorn Andersson , Akhil P Oommen , freedreno@lists.freedesktop.org, "Kristian H . Kristensen" , dri-devel@lists.freedesktop.org, Sai Prakash Ranjan Subject: [PATCHv4 5/6] iommu: arm-smmu-impl: Use table to list QCOM implementations Date: Fri, 11 Sep 2020 14:28:14 +0000 Message-ID: <010101747d9117dd-eb187e14-ec3b-49e2-a81e-843093301055-000000@us-west-2.amazonses.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: References: MIME-Version: 1.0 X-SES-Outgoing: 2020.09.11-54.240.27.187 Feedback-ID: 1.us-west-2.CZuq2qbDmUIuT3qdvXlRHZZCpfZqZ4GtG9v3VKgRyF0=:AmazonSES Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use table and of_match_node() to match qcom implementation instead of multiple of_device_compatible() calls for each QCOM SMMU implementation. Signed-off-by: Sai Prakash Ranjan --- drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c index d199b4bff15d..ce78295cfa78 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c @@ -9,6 +9,13 @@ #include "arm-smmu.h" +static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = { + { .compatible = "qcom,sc7180-smmu-500" }, + { .compatible = "qcom,sdm845-smmu-500" }, + { .compatible = "qcom,sm8150-smmu-500" }, + { .compatible = "qcom,sm8250-smmu-500" }, + { } +}; static int arm_smmu_gr0_ns(int offset) { @@ -217,10 +224,7 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) if (of_device_is_compatible(np, "nvidia,tegra194-smmu")) return nvidia_smmu_impl_init(smmu); - if (of_device_is_compatible(np, "qcom,sdm845-smmu-500") || - of_device_is_compatible(np, "qcom,sc7180-smmu-500") || - of_device_is_compatible(np, "qcom,sm8150-smmu-500") || - of_device_is_compatible(np, "qcom,sm8250-smmu-500")) + if (of_match_node(qcom_smmu_impl_of_match, np)) return qcom_smmu_impl_init(smmu); if (of_device_is_compatible(smmu->dev->of_node, "qcom,adreno-smmu"))