From patchwork Thu Dec 10 10:02:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 340979 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5381910jai; Thu, 10 Dec 2020 01:57:28 -0800 (PST) X-Google-Smtp-Source: ABdhPJwvaqgxKMnolIrvF5F88RFv3DHccAh0uND1ipbDf3OMDmLWZ3IIo3i9cTxtZZ/jduAkS/X7 X-Received: by 2002:a05:6402:d08:: with SMTP id eb8mr6023037edb.271.1607594248014; Thu, 10 Dec 2020 01:57:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607594248; cv=none; d=google.com; s=arc-20160816; b=MHnn3gLNwcDaxPWuiq5uJsOFnkcfBtQFnrP1GpxZbcrwzhUHVRI2Gm9SFXs3iIcwfa 3cteqYoDQ7W9oeokO3hEBrwDOPxG1r+WpAoOOgyjO/lHHcq0bPyv0YWfEvGpoU4KvEQM 7jldd18qaJ7YBl9QHI+0uUy0lo7lZ0Ew4EVwvp5KUOI+YdsULUNPWl38U2uJWnMFgf6D RnUUNqgBS/h69oDa3RDmdn098D34OPNrZmIU0zjLYt+/0sFXPECh6DwxEXJF3dGbX7Df D03e3ISEWuEJaS2iG9UTkv40S0zRFw5RSe/7E93A/QLse4LKTrSbxExTLRNrADHXnj3O usvQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=pOEXaNJekDpHw1CP3O0Pj76+vI42wYO3Vt7QFcDTgJc=; b=OObtF71YrmWiMMnIlr99+7xBlxxx8wOf6oIuna413OSC4KtskKPtlWyZc+4eGuWliR XqJLI+N8E6bj9XBAYw9yNegyoj4LJgAkxfieNd9y71X4N14a2IsXAO30FpX1B6rMSR05 NjPUY3bggzpywkXbqRIp6G3Lk1psMw++bYC1OkBnBRl92OvQ/VAhSpTeB4/RrfagB7WM up08xb2hTiHi+hEo3Vt2XmXoh63ACuzYCX0sDxC1j8Rfrm3oWFrWsQIrPeba+b3dQLb8 9ZMpb+3RHs4EyzMwbBVuEX6ou9rYQ7QQ5FOdhEdMeyr8pNiGJmyWuI9dLZTF8hVohhOK OspQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pXGA6QhD; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id 11si2499658edv.53.2020.12.10.01.57.27; Thu, 10 Dec 2020 01:57:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pXGA6QhD; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726613AbgLJJ5V (ORCPT + 15 others); Thu, 10 Dec 2020 04:57:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729017AbgLJJ5B (ORCPT ); Thu, 10 Dec 2020 04:57:01 -0500 Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 06A4BC0611CE for ; Thu, 10 Dec 2020 01:55:58 -0800 (PST) Received: by mail-wr1-x441.google.com with SMTP id 91so4780235wrj.7 for ; Thu, 10 Dec 2020 01:55:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pOEXaNJekDpHw1CP3O0Pj76+vI42wYO3Vt7QFcDTgJc=; b=pXGA6QhDrCOw9SnFeootvMsNGyD2l57cLugkuXwhJvjZMRl3Edivv6iOFetcNz6GRC QpgyquTX7K/Ew/s2/4YCKYHM/u/q1dzkGAP9yelfLHN9OxKULcvl43CHtBF/U97NnP/2 zIoNuq3qY4HSggQupp+v6E8W47ZMybSpY4sVXWyBbxvbmRk2HQRaLrlceyA4rWYsvy// dtC0fglPg36NXqfM0jPCLkrp8YUSE31F8ne74c9LXsZhD4hc+nzNnLdr053nuHtJghNX zC+KDYMhdAkrELi3mO8pfzy8SsOBL1NkAcTV5frichnfL5jB8hYQ6/oZ4PzkuAQouDZp n2XA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pOEXaNJekDpHw1CP3O0Pj76+vI42wYO3Vt7QFcDTgJc=; b=Wa+t4YeN2djYBrKSQ5QziAFTaHQTUlsDds2RyOMcbJ/Bn+78SJOd0vquiWUd7mjpAG IGekin2Noft0fwVJkZdwP4vdnHbtQ8GHpD5tD98fJHaE9zzKmDXdjrlm2ZdpE7lCWqUZ 70p0NEjyFQK5oMbD+VMONNi/hcJO7OW5AGxdPjQk6FOfuF00IwmbYWla8s3G/ahyjLuF C65S5hoF9DHuQq8ol+Z2B1WnUuaM98mJ1GhoIQTJl+xFAG2M+8cls27KOdZs1M/cOSri riqc7UejCJqn8G1lO8t8eYBI2diYNlxuQ6IivoBy6UEcA2kscvNuPfAHENXzTA7JZqUa kk8A== X-Gm-Message-State: AOAM531QkqrfJ/8rkw2cavfALXNdzKfo8VM/CfXVESVro47tAvqEMMsJ o4aaW2YdEloVNib/38yTJCeNbg== X-Received: by 2002:adf:94c7:: with SMTP id 65mr7035251wrr.423.1607594156720; Thu, 10 Dec 2020 01:55:56 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:4468:1cc2:be0c:233f]) by smtp.gmail.com with ESMTPSA id l16sm9043721wrx.5.2020.12.10.01.55.56 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 10 Dec 2020 01:55:56 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org, bbhatt@codeaurora.org, Loic Poulain Subject: [PATCH v4 02/10] bus: mhi: core: Add device hardware reset support Date: Thu, 10 Dec 2020 11:02:47 +0100 Message-Id: <1607594575-31590-3-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607594575-31590-1-git-send-email-loic.poulain@linaro.org> References: <1607594575-31590-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The MHI specification allows to perform a hard reset of the device when writing to the SOC_RESET register. It can be used to completely restart the device (e.g. in case of unrecoverable MHI error). This is up to the MHI controller driver to determine when this hard reset should be used, and in case of MHI errors, should be used as a reset of last resort (after standard MHI stack reset). This function is prefixed with 'mhi_reg' to highlight that this is a stateless function, the MHI layer do nothing except triggering the reset by writing into the right register, this is up to the caller to ensure right mhi_controller state (e.g. unregister the controller if necessary). Signed-off-by: Loic Poulain --- drivers/bus/mhi/core/main.c | 7 +++++++ include/linux/mhi.h | 7 +++++++ 2 files changed, 14 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c index a353d1e..9f8ce15 100644 --- a/drivers/bus/mhi/core/main.c +++ b/drivers/bus/mhi/core/main.c @@ -142,6 +142,13 @@ enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl) } EXPORT_SYMBOL_GPL(mhi_get_mhi_state); +void mhi_reg_soc_reset(struct mhi_controller *mhi_cntrl) +{ + mhi_write_reg(mhi_cntrl, mhi_cntrl->regs, MHI_SOC_RESET_REQ_OFFSET, + MHI_SOC_RESET_REQ); +} +EXPORT_SYMBOL_GPL(mhi_reg_soc_reset); + int mhi_map_single_no_bb(struct mhi_controller *mhi_cntrl, struct mhi_buf_info *buf_info) { diff --git a/include/linux/mhi.h b/include/linux/mhi.h index 2754742..8b1bf80 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -687,6 +687,13 @@ enum mhi_ee_type mhi_get_exec_env(struct mhi_controller *mhi_cntrl); enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl); /** + * mhi_reg_soc_reset - Trigger a device reset. This can be used as a last resort + * to reset and recover a device. + * @mhi_cntrl: MHI controller + */ +void mhi_reg_soc_reset(struct mhi_controller *mhi_cntrl); + +/** * mhi_device_get - Disable device low power mode * @mhi_dev: Device associated with the channel */