From patchwork Mon Jan 4 13:49:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 356389 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp14980260jai; Mon, 4 Jan 2021 05:45:09 -0800 (PST) X-Google-Smtp-Source: ABdhPJy5QBnxsvMUoCFSXWEIajnvCMhqHDDWUhjJTZtAAilLCqDHM4TNnVDEWODhOemq9EZEVLCg X-Received: by 2002:a50:d553:: with SMTP id f19mr69581090edj.323.1609767909149; Mon, 04 Jan 2021 05:45:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1609767909; cv=none; d=google.com; s=arc-20160816; b=Hm23xdRD8eG99/ieHhhPw/g/TrNZ24Wr2FOUPLP3AjdKBVH00psQjSY6FNz0Xs4eUc mAbvbi7zRCzJONQVYKDYzEbdBZoAKi+/QWxnh9IWbibNX0Gr960bEhSs08iF55+yQpDx lU8HqX+7Yby/LqSjft1fynW6YDjsY7CqICKQTEhXJJWV0ttLSsKt1f1/CbeTo3mcrnBM yd3vxOm9zqmbvvp8kniK5XpuEcqxI6ZYBixGlH8jvZekNfsfkLwoaj5VRjI96YzU4KI0 jHw0XIQ04+UPKNJlN3hVCg3P7WqzhFgst7H6YLMksCKpb9ahAEwfLeRPy9NDPLEHv5Ax ohHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=EOo3BNm4x4mG1DWr8qM1BD2pKXPDPKK8io/piH3q8xM=; b=ZkAuuF2hEinmtmyTl9t/Ya2F89V9izjKMxdGLIFyWixkM0YYcF/re5ADQiGxvzJZwm kk0Jh+XceIS8h/gM80p2gpGZC3qsHaDXNUcsWQUuqtI++7dngf4edqRnhftYUHStZHul y7+zU8BiSe4+mVejc7dLH2dwjb8/C78p4UHHTnwmQqMuPS1zfDDKsrK2yOHxDjGYWXtt Spys8EJfqjmM9GRfeO4MnTYJyW4yIiDrrc81t4+3FbrUkV2dAbnUgpuwLU7+XfrKLvs+ Dtu1P5FguRI54bKkeJWGlfnbeaTH/HxUp0EAv/2GVwkg6FWWq7Zscj473ZLMYNy8Ojoz +NjA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=L6wvuTc+; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id md13si29386655ejb.324.2021.01.04.05.45.08; Mon, 04 Jan 2021 05:45:09 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=L6wvuTc+; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726762AbhADNna (ORCPT + 15 others); Mon, 4 Jan 2021 08:43:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726628AbhADNna (ORCPT ); Mon, 4 Jan 2021 08:43:30 -0500 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36F67C06179F for ; Mon, 4 Jan 2021 05:42:16 -0800 (PST) Received: by mail-wr1-x433.google.com with SMTP id d26so32153292wrb.12 for ; Mon, 04 Jan 2021 05:42:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EOo3BNm4x4mG1DWr8qM1BD2pKXPDPKK8io/piH3q8xM=; b=L6wvuTc+1u/60ET5ddZI4mKwQ7b5L/Snp5jkKl0OmWy/7Bld3JYHIRYb3bYavH9udS VDV3dB4gotsbgYS0+K0q2sHD3Dn7ruiiOGUf5JltnzU5Zp2aiSoSN7oHao+hNqKuy66j ExAhP5YBw0qMZCcRcCYqNLi9eBQhWXleIUBirRG5yGW1qQJsIdYm8OxWfCc4uoY/MsZH bZRd41tP5QGy2mcgjhVt1AgCjFmnkLG8Jip4kt5CNaWpRJqsNB/SbXoNxzqQ69PBBBHq lUxKOCeRbF4kEzA1IzEBkWJLoYll1ffbi83JbWt0U+JLRh8xpZI3Zo0yafI5TFdIebhP 55tw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EOo3BNm4x4mG1DWr8qM1BD2pKXPDPKK8io/piH3q8xM=; b=beDEKlW9QTg5rvTV0b9hlVD0iyLCvRb45oS/zvZu5uiJnzhLLLIOMDcgXbRmQchiDI Sse/84YwESMBxXeXoB6x8RtXp1ERQ5eO6B4ldOjA+zNCHVaQ65qv0IWxMj+/xXlqUc/Y yv2bf7xFjcAbYECGkeR/QwFP32x6YzST3LJHwG98CmUKciIZi6B6ugid8zhfi2d+Mcjn SCGCsc1C3ruuvr/HpLO9Fe4ybZSoZc8pWaaoJjyom6q/YT8z8NzzwSLfdkwMIihTuFD2 k2l9xEdHUtfNaQBabKV1RL6iz4cHkdRnserbXwOkFB/zsjtyGuOYuVAdfsAUzkjQAsq5 N5rA== X-Gm-Message-State: AOAM530ZNs0TmIHy8Bghs4F1r88njFLAgD9bmZvRxQevvivdn+a7oZ1o 4ttZrnrn5AQfqqUYf8ITJyfHQQ== X-Received: by 2002:adf:97ce:: with SMTP id t14mr80328599wrb.368.1609767734920; Mon, 04 Jan 2021 05:42:14 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:41b:e085:fa9a:9c53]) by smtp.gmail.com with ESMTPSA id w4sm34042968wmc.13.2021.01.04.05.42.14 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Jan 2021 05:42:14 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, hemantk@codeaurora.org, Loic Poulain Subject: [PATCH v7 07/10] mhi: pci_generic: Add health-check Date: Mon, 4 Jan 2021 14:49:36 +0100 Message-Id: <1609768179-10132-8-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1609768179-10132-1-git-send-email-loic.poulain@linaro.org> References: <1609768179-10132-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org If the modem crashes for any reason, we may not be able to detect it at MHI level (MHI registers not reachable anymore). This patch implements a health-check mechanism to check regularly that device is alive (MHI layer can communicate with). If device is not alive (because a crash or unexpected reset), the recovery procedure is triggered. Tested successfully with Telit FN980m module. Signed-off-by: Loic Poulain Reviewed-by: Manivannan Sadhasivam Reviewed-by: Hemant Kumar --- drivers/bus/mhi/pci_generic.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 0c12027..7e54d88 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -14,11 +14,15 @@ #include #include #include +#include #include #define MHI_PCI_DEFAULT_BAR_NUM 0 #define MHI_POST_RESET_DELAY_MS 500 + +#define HEALTH_CHECK_PERIOD (HZ * 2) + /** * struct mhi_pci_dev_info - MHI PCI device specific information * @config: MHI controller configuration @@ -189,6 +193,7 @@ struct mhi_pci_device { struct mhi_controller mhi_cntrl; struct pci_saved_state *pci_state; struct work_struct recovery_work; + struct timer_list health_check_timer; unsigned long status; }; @@ -326,6 +331,8 @@ static void mhi_pci_recovery_work(struct work_struct *work) dev_warn(&pdev->dev, "device recovery started\n"); + del_timer(&mhi_pdev->health_check_timer); + /* Clean up MHI state */ if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, false); @@ -351,6 +358,7 @@ static void mhi_pci_recovery_work(struct work_struct *work) dev_dbg(&pdev->dev, "Recovery completed\n"); set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); return; err_unprepare: @@ -360,6 +368,21 @@ static void mhi_pci_recovery_work(struct work_struct *work) dev_err(&pdev->dev, "Recovery failed\n"); } +static void health_check(struct timer_list *t) +{ + struct mhi_pci_device *mhi_pdev = from_timer(mhi_pdev, t, health_check_timer); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + if (!mhi_pci_is_alive(mhi_cntrl)) { + dev_err(mhi_cntrl->cntrl_dev, "Device died\n"); + queue_work(system_long_wq, &mhi_pdev->recovery_work); + return; + } + + /* reschedule in two seconds */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); +} + static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { const struct mhi_pci_dev_info *info = (struct mhi_pci_dev_info *) id->driver_data; @@ -376,6 +399,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) return -ENOMEM; INIT_WORK(&mhi_pdev->recovery_work, mhi_pci_recovery_work); + timer_setup(&mhi_pdev->health_check_timer, health_check, 0); mhi_cntrl_config = info->config; mhi_cntrl = &mhi_pdev->mhi_cntrl; @@ -427,6 +451,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + /* start health check */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + return 0; err_unprepare: @@ -442,6 +469,7 @@ static void mhi_pci_remove(struct pci_dev *pdev) struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + del_timer(&mhi_pdev->health_check_timer); cancel_work_sync(&mhi_pdev->recovery_work); if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { @@ -459,6 +487,8 @@ static void mhi_pci_reset_prepare(struct pci_dev *pdev) dev_info(&pdev->dev, "reset\n"); + del_timer(&mhi_pdev->health_check_timer); + /* Clean up MHI state */ if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, false); @@ -502,6 +532,7 @@ static void mhi_pci_reset_done(struct pci_dev *pdev) } set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); } static pci_ers_result_t mhi_pci_error_detected(struct pci_dev *pdev, @@ -562,6 +593,7 @@ static int __maybe_unused mhi_pci_suspend(struct device *dev) struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + del_timer(&mhi_pdev->health_check_timer); cancel_work_sync(&mhi_pdev->recovery_work); /* Transition to M3 state */ @@ -597,6 +629,9 @@ static int __maybe_unused mhi_pci_resume(struct device *dev) goto err_recovery; } + /* Resume health check */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + return 0; err_recovery: