From patchwork Mon Jan 4 16:14:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 356395 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp15089498jai; Mon, 4 Jan 2021 08:10:26 -0800 (PST) X-Google-Smtp-Source: ABdhPJzjdnaqF2tvFzgB6x1ByEFUgsqr+zHq6AAnAdzNTPK65hjaTrc+ogWR3LJkp4ToCyzNq5bm X-Received: by 2002:a17:906:60c3:: with SMTP id f3mr66630737ejk.65.1609776626450; Mon, 04 Jan 2021 08:10:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1609776626; cv=none; d=google.com; s=arc-20160816; b=xnsbUilbjTT9AXRoAjvw3vZE7v23gVE3lqbzbPOJbnjw1NDgJp34U+umlzMO0eigZP z8AhTQBzKYLZ3WaQPh4+VJvFGDU+B2Vw1CgI1T4api3Ilqkmk3c08QPDz14P5bglN94f eqXUbiHn9qHvSNXEpysCyPKFNVA4GBS2lb1+zjG7cXJPaEDcXuJJ6Q9omBYHZ8PDjz3q Ooexcqp5joFs66d9Te44QdetvUYcJnw9oozCI3NwS8jpafSPq9aBlS9i6fFcOX0r2nC6 uCm8XAkZ/WBtLwN22FR4gIqpZkYTzI4u2gwTRMxurSlfKUQE81/6QmFNjHrxcpRCneuu chJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=078yqWa4fm6+2z9avg2zxC4IELqOvwOqSWVwgOyL6OI=; b=K3VdwIvmey3WCSlX7zwMPPArZ9rGOQG+PBji8HnwP9SRHAqNSIyQ9a/RyqbvuqIotO q6vckTefKE3UlCa5IEVg9dbBmBLXGbTJ/YPhOthxlracSV35RDI06yj1v64T24ycnkdi 9ckh/9OXOehGFd6GzQmzLksQKoN838wLTD5pSQu5p+i8O4h7+l35OPw4CTLkOroNfksn mXPPlG8gd0bMXS2PYBMIsw5Lenn5CIySYfoEMyKYNX+95m4RuIQn/wVMFfqx4VDeyP9G Ic5aFsw6OT6VYZfzwuKa07A0U93W9aIai5D80cUjdZmgqIufzPzT6ZKnqSuf5dfzHyp1 Q7ow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CDEOR81M; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id 61si31780067edk.598.2021.01.04.08.10.26; Mon, 04 Jan 2021 08:10:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CDEOR81M; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729617AbhADQIx (ORCPT + 15 others); Mon, 4 Jan 2021 11:08:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729618AbhADQIv (ORCPT ); Mon, 4 Jan 2021 11:08:51 -0500 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EEDA7C0617A0 for ; Mon, 4 Jan 2021 08:07:37 -0800 (PST) Received: by mail-wr1-x42e.google.com with SMTP id t16so32713816wra.3 for ; Mon, 04 Jan 2021 08:07:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=078yqWa4fm6+2z9avg2zxC4IELqOvwOqSWVwgOyL6OI=; b=CDEOR81MrtxNlbV7eOqXQyiqrgV2zUyCd5JI+iNC407BJ5Ri6WAzuNr9LOgC2IV6n7 U3BRFMqLaFCOxERYu7SdH2pLsbAr1Lw1c4T91Z8e5X/cvMPurzlOERXiNitlXvn6gjVd 8xXWUfNSZgJM7G57IT+B39u4e2o38acq7MBWWT48Nt0xT9Po6fLEPAMbfNr8ll/n+hnC /JxGyDIPXJvtvqu4Ermy8NoVzsLPb7cyHH4lSOEM1De3BziNh4bf1OkdMOU1S3lW2Vg6 s7pNswyRTTz/MwS0r/PgCKmwp/zxlExom+pdhnJBqr1rCJoJQdpSi+P5zWcclty8yAi7 Lw3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=078yqWa4fm6+2z9avg2zxC4IELqOvwOqSWVwgOyL6OI=; b=MoCZRkpB3Hmkc3DH54kescq4cDAQDyXyuZM2tYz39Jv2oWQ2btylHyYey9GiuYlwE0 JHfKuGbBQkyMW7Hb/lR1EN0b5L4THC2CiDwedpM4O0VHoXjyptIASFOgijVxmsLOJvsH umcVsB8t0qifX+UrhTHXaSdUeTyMevMpGqzVFqHfEVgS8iZsTysQndaMX5Ky0BQ3d95o wwkNM1TSDHFrazrIionpJDvy/yAWNZrc+G+Va2EfikB7xAZeAbAmsG/OQp2tIMgrEjnt YbuOdeI4PwnkXwdMTBgFoyUULrV0hIXQFJlsIzAJOdTxtZWX06mMbz1WpDM6EPR16o6v dO0A== X-Gm-Message-State: AOAM532GuF0fLeQVQfBHy32mdqiFs97v4+OU8c77bws0xo4A80UiH7kC gQiQ46HOb6GroT2q3nVn7QHC9A== X-Received: by 2002:adf:e552:: with SMTP id z18mr83538582wrm.29.1609776456737; Mon, 04 Jan 2021 08:07:36 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:41b:e085:fa9a:9c53]) by smtp.gmail.com with ESMTPSA id h9sm89278049wre.24.2021.01.04.08.07.35 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Jan 2021 08:07:36 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org, hemantk@codeaurora.org, Loic Poulain Subject: [PATCH v8 10/10] mhi: pci_generic: Set irq moderation value to 1ms for hw channels Date: Mon, 4 Jan 2021 17:14:59 +0100 Message-Id: <1609776899-30664-11-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1609776899-30664-1-git-send-email-loic.poulain@linaro.org> References: <1609776899-30664-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org MHI hardware channels are usually the hardware accelerated data path e.g. IP packets path for modems. This path needs to be optimized for low latency and high throughput. After several tests on FN980m SDX55 based modem, it seems 1ms is a good default irq_moderation value: - It allows to reach the maximum download throughput - It introduces limited latency (5ms is too high) - It prevents interrupt flooding Signed-off-by: Loic Poulain Reviewed-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 5104084..c13de0f 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -130,7 +130,7 @@ struct mhi_pci_dev_info { #define MHI_EVENT_CONFIG_HW_DATA(ev_ring, ch_num) \ { \ .num_elements = 256, \ - .irq_moderation_ms = 5, \ + .irq_moderation_ms = 1, \ .irq = (ev_ring) + 1, \ .priority = 1, \ .mode = MHI_DB_BRST_DISABLE, \