From patchwork Tue Oct 18 09:46:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 616120 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07CD1C43217 for ; Tue, 18 Oct 2022 09:47:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230073AbiJRJrY (ORCPT ); Tue, 18 Oct 2022 05:47:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34698 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230159AbiJRJrW (ORCPT ); Tue, 18 Oct 2022 05:47:22 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CC3EAB03C7; Tue, 18 Oct 2022 02:47:20 -0700 (PDT) Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 29I9jMkZ017936; Tue, 18 Oct 2022 09:47:14 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=tY2z4WJ5AduiekpRi5DDE6hETVvpctkBxz/wYTSc8HU=; b=EnZsN14rM4iaUm3SzxM+RQrXBDB2GOGQcERkHuMpQXTwHTrIMfFDKhxP3xzRyWWRmkd6 iQVDMBU6ZV+W7U1+utWQxLm1oTB1Xw2qfWT8CbwTu9hIDM2CH6QX/VIXmGkYG1SZR4jm qqTK3e/u71ts8LwyFguNSwoyVpBRYyUbMXaUNWUJmV/yhd4cXSghjB014qDRyvC6Dodg W8edEprrQJ+6ucKRe9Dvqg7S+GOcp0eHJ2dfd8UfiKdL1UoPHLDjxnhgjDWEzH1BBqin h1KDVzQO4R4UzNAszaIuA6ljljy6z7nlrCEGsAIDVMqRnq+xv+CDDccdwvTcrWkAaI49 Ow== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3k9hd5s2e8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Oct 2022 09:47:14 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 29I9lD7s023952 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Oct 2022 09:47:13 GMT Received: from blr-ubuntu-87.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Tue, 18 Oct 2022 02:47:09 -0700 From: Sibi Sankar To: , , CC: , , , , , , , , Sibi Sankar Subject: [PATCH V3 1/2] dt-bindings: firmware: qcom-scm: Add optional interrupt Date: Tue, 18 Oct 2022 15:16:45 +0530 Message-ID: <1666086406-5452-2-git-send-email-quic_sibis@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1666086406-5452-1-git-send-email-quic_sibis@quicinc.com> References: <1666086406-5452-1-git-send-email-quic_sibis@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 9kZQ9idKDbd9k6MMmq25DxF3dOPVZRSB X-Proofpoint-GUID: 9kZQ9idKDbd9k6MMmq25DxF3dOPVZRSB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-18_03,2022-10-17_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 mlxscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 mlxlogscore=805 bulkscore=0 adultscore=0 malwarescore=0 phishscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210180055 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Guru Das Srinagesh Add an interrupt specification to the bindings to support the wait-queue feature. Signed-off-by: Guru Das Srinagesh Signed-off-by: Sibi Sankar --- The interrupt property for scm firmware from a binding perspective is completely optional i.e. not all tz fw running in the wild on sm8450 devices support this feature. The bootloader does the interrupt property addition on sm8450 devices with wait-queue support. Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml index c5b76c9f7ad0..6483d76b2371 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml @@ -71,6 +71,11 @@ properties: '#reset-cells': const: 1 + interrupts: + description: + The wait-queue interrupt that firmware raises as part of handshake + protocol to handle sleeping SCM calls. + qcom,dload-mode: $ref: /schemas/types.yaml#/definitions/phandle-array items: