| Message ID | 1671702170-24781-7-git-send-email-quic_srivasam@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add SC7280 audioreach device tree nodes. | expand |
On 22/12/2022 10:42, Srinivasa Rao Mandadapu wrote: > Update VA, RX and TX macro and lpass_tlmm clock properties and > enable them. No. You need to describe why you are doing. Not just "Update". Everything is an "update". > > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> > --- > .../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 43 ++++++++++++++++++++++ > 1 file changed, 43 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > index ce5d69e..a0061ef 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi > @@ -119,6 +119,49 @@ > status = "okay"; > }; > > +&lpass_tlmm { > + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; > + > + clock-names = "core", "audio"; > + reg = <0 0x033c0000 0x0 0x20000>, > + <0 0x03550000 0x0 0xa100>; 1. Why are you doing it? 2. Why here, not in DTSI? 3. Does it pass dtbs_check? > +}; > + > +&lpass_va_macro { > + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; > + > + clock-names = "mclk", "macro", "dcodec"; > + power-domain-names = "null"; ??? This code looks like not taken from mainline, but some odd tree. Please work on mainline. Do you see anywhere names called "null"? Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi index ce5d69e..a0061ef 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi @@ -119,6 +119,49 @@ status = "okay"; }; +&lpass_tlmm { + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + + clock-names = "core", "audio"; + reg = <0 0x033c0000 0x0 0x20000>, + <0 0x03550000 0x0 0xa100>; +}; + +&lpass_va_macro { + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + + clock-names = "mclk", "macro", "dcodec"; + power-domain-names = "null"; + status = "okay"; +}; + +&lpass_rx_macro { + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_va_macro>; + + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; + power-domain-names = "null"; + status = "okay"; +}; + +&lpass_tx_macro { + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_va_macro>; + + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; + power-domain-names = "null"; + status = "okay"; +}; + &soc { qcom,lpass@3000000 { compatible = "qcom,sc7280-adsp-pil";