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Fri, 19 Jan 2024 13:00:42 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 40JD0fbb023804; Fri, 19 Jan 2024 13:00:41 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 40JD0fN1023801; Fri, 19 Jan 2024 13:00:41 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id 5BE75273A; Fri, 19 Jan 2024 18:30:40 +0530 (+0530) From: Mrinmay Sarkar To: vkoul@kernel.org, jingoohan1@gmail.com, conor+dt@kernel.org, konrad.dybcio@linaro.org, manivannan.sadhasivam@linaro.org, robh+dt@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, quic_schintav@quicinc.com, quic_shijjose@quicinc.com, Mrinmay Sarkar , Gustavo Pimentel , Serge Semin , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, mhi@lists.linux.dev Subject: [PATCH v1 4/6] dmaengine: dw-edma: Move HDMA_V0_MAX_NR_CH definition to edma.h Date: Fri, 19 Jan 2024 18:30:20 +0530 Message-Id: <1705669223-5655-5-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1705669223-5655-1-git-send-email-quic_msarkar@quicinc.com> References: <1705669223-5655-1-git-send-email-quic_msarkar@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 2M1_j7cANaScCFkrQDV0zx96fN0Wmx4y X-Proofpoint-ORIG-GUID: 2M1_j7cANaScCFkrQDV0zx96fN0Wmx4y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-19_07,2024-01-19_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 clxscore=1015 impostorscore=0 phishscore=0 mlxlogscore=695 mlxscore=0 suspectscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401190066 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: From: Manivannan Sadhasivam To maintain uniformity with eDMA, let's move the HDMA max channel definition to edma.h. While at it, let's also rename it to HDMA_MAX_NR_CH. Signed-off-by: Manivannan Sadhasivam Signed-off-by: Mrinmay Sarkar --- drivers/dma/dw-edma/dw-hdma-v0-core.c | 4 ++-- drivers/dma/dw-edma/dw-hdma-v0-regs.h | 3 +-- include/linux/dma/edma.h | 1 + 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c index 1f4cb7d..819ef1f 100644 --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c @@ -54,7 +54,7 @@ static void dw_hdma_v0_core_off(struct dw_edma *dw) { int id; - for (id = 0; id < HDMA_V0_MAX_NR_CH; id++) { + for (id = 0; id < HDMA_MAX_NR_CH; id++) { SET_BOTH_CH_32(dw, id, int_setup, HDMA_V0_STOP_INT_MASK | HDMA_V0_ABORT_INT_MASK); SET_BOTH_CH_32(dw, id, int_clear, @@ -70,7 +70,7 @@ static u16 dw_hdma_v0_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir) * available, we set it to maximum channels and let the platform * set the right number of channels. */ - return HDMA_V0_MAX_NR_CH; + return HDMA_MAX_NR_CH; } static enum dma_status dw_hdma_v0_core_ch_status(struct dw_edma_chan *chan) diff --git a/drivers/dma/dw-edma/dw-hdma-v0-regs.h b/drivers/dma/dw-edma/dw-hdma-v0-regs.h index a974abd..cd7eab2 100644 --- a/drivers/dma/dw-edma/dw-hdma-v0-regs.h +++ b/drivers/dma/dw-edma/dw-hdma-v0-regs.h @@ -11,7 +11,6 @@ #include -#define HDMA_V0_MAX_NR_CH 8 #define HDMA_V0_LOCAL_ABORT_INT_EN BIT(6) #define HDMA_V0_REMOTE_ABORT_INT_EN BIT(5) #define HDMA_V0_LOCAL_STOP_INT_EN BIT(4) @@ -92,7 +91,7 @@ struct dw_hdma_v0_ch { } __packed; struct dw_hdma_v0_regs { - struct dw_hdma_v0_ch ch[HDMA_V0_MAX_NR_CH]; /* 0x0000..0x0fa8 */ + struct dw_hdma_v0_ch ch[HDMA_MAX_NR_CH]; /* 0x0000..0x0fa8 */ } __packed; struct dw_hdma_v0_lli { diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h index 550f6a4..2cdf249a 100644 --- a/include/linux/dma/edma.h +++ b/include/linux/dma/edma.h @@ -14,6 +14,7 @@ #define EDMA_MAX_WR_CH 8 #define EDMA_MAX_RD_CH 8 +#define HDMA_MAX_NR_CH 8 struct dw_edma; struct dw_edma_chip;