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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id b4sm22777892pgq.57.2019.02.20.22.44.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 20 Feb 2019 22:44:15 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Rajendra Nayak Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] arm64: dts: qcom: qcs404: Add rpmpd node Date: Wed, 20 Feb 2019 22:44:34 -0800 Message-Id: <20190221064434.2760-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190221064434.2760-1-bjorn.andersson@linaro.org> References: <20190221064434.2760-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the rpmpd node on the qcs404 and define the available levels. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 35 ++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) -- 2.18.0 diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 6c86b267da82..1ceb0432af55 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -4,6 +4,7 @@ #include #include #include +#include / { interrupt-parent = <&intc>; @@ -240,6 +241,40 @@ compatible = "qcom,rpmcc-qcs404"; #clock-cells = <1>; }; + + rpmpd: power-controller { + compatible = "qcom,qcs404-rpmpd"; + #power-domain-cells = <1>; + operating-points-v2 = <&rpmpd_opp_table>; + + rpmpd_opp_table: opp-table { + compatible = "operating-points-v2"; + + rpmpd_opp1: opp1 { + opp-level = <1>; + }; + + rpmpd_opp2: opp2 { + opp-level = <2>; + }; + + rpmpd_opp3: opp3 { + opp-level = <3>; + }; + + rpmpd_opp4: opp4 { + opp-level = <4>; + }; + + rpmpd_opp5: opp5 { + opp-level = <5>; + }; + + rpmpd_opp6: opp6 { + opp-level = <6>; + }; + }; + }; }; };