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[92.233.226.227]) by smtp.gmail.com with ESMTPSA id a18sm3004404wrr.20.2020.12.02.10.07.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 10:07:57 -0800 (PST) From: Srinivas Kandagatla To: bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, agross@kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla , Dmitry Baryshkov Subject: [PATCH v2 5/6] arm64: dts: qcom: sm8250: add mi2s pinconfs Date: Wed, 2 Dec 2020 18:07:40 +0000 Message-Id: <20201202180741.16386-6-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20201202180741.16386-1-srinivas.kandagatla@linaro.org> References: <20201202180741.16386-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add primary and tertinary mi2s pinconfs required to get I2S audio. Signed-off-by: Srinivas Kandagatla Tested-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 55 ++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index d2ade3ab3389..51cffdae631c 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1884,6 +1884,37 @@ gpio-ranges = <&tlmm 0 0 180>; wakeup-parent = <&pdc>; + pri_mi2s_active: pri-mi2s-active { + sclk { + pins = "gpio138"; + function = "mi2s0_sck"; + drive-strength = <8>; + bias-disable; + }; + + ws { + pins = "gpio141"; + function = "mi2s0_ws"; + drive-strength = <8>; + output-high; + }; + + data0 { + pins = "gpio139"; + function = "mi2s0_data0"; + drive-strength = <8>; + bias-disable; + output-high; + }; + + data1 { + pins = "gpio140"; + function = "mi2s0_data1"; + drive-strength = <8>; + output-high; + }; + }; + qup_i2c0_default: qup-i2c0-default { mux { pins = "gpio28", "gpio29"; @@ -2480,6 +2511,30 @@ function = "qup18"; }; }; + + tert_mi2s_active: tert-mi2s-active { + sck { + pins = "gpio133"; + function = "mi2s2_sck"; + drive-strength = <8>; + bias-disable; + }; + + data0 { + pins = "gpio134"; + function = "mi2s2_data0"; + drive-strength = <8>; + bias-disable; + output-high; + }; + + ws { + pins = "gpio135"; + function = "mi2s2_ws"; + drive-strength = <8>; + output-high; + }; + }; }; apps_smmu: iommu@15000000 {