From patchwork Thu Jul 15 06:51:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 477401 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp1408755jao; Wed, 14 Jul 2021 23:52:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwTU4O4ZfxIL9+PuhJd0aKgGgk2h0NWFhIR0ZY3j8W3satsIo7w+ML4IKSiWSSTeWqrJ8O2 X-Received: by 2002:a05:6402:1c8a:: with SMTP id cy10mr4500563edb.232.1626331965059; Wed, 14 Jul 2021 23:52:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626331965; cv=none; d=google.com; s=arc-20160816; b=l6vAMNIFgcJfqpyPCKA07ZXuqULW3ZV4mThMXGvcFgDSb502pHoUJshxUBNVqeyevN aQzHEEoJhqV4uSNnvF9wukP4uSoK9ws1tz2wNHEVbn33ToYWDY6NC9dJ7mp+66o1Zdgm BCq7Birz1Mz3XaB4BBgKz3AAoNJ787eF+u033hoo2kenHLbzNtPIcPsLK9iKQn8jaCwb wV93cKU22kcWPUlhpRXhR/cdAFHuU3J/mPAOTBTvpoxtW6SYSGVmpIHomyLQXjW5fNkB UUBAjCAKhgcKrEsvWv15RYHK3NVnciyMX/F5zleTdp1wlaDuP6FH4v8jALzknePmTI2x SxaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=XsufWckrP028YIElMUdyxdJJo0hMN6eeJbc1XQy7RLQ=; b=fswUt8rXuf7mjW/TW87P8CK3R88smDwhO71wMWGaN+ZH3Zq0Paaq+qR18s/fkC0OsH 9yEIR9hzLKfx20wHymUUjRL1zLVYwadQsO4vhRDj46FiA0USlVfKixR3RSi3kwOmjDFS Pzdbq/eRlMemzhgh8iKjuozjJudgzQtcvHa6AZWoJbkogbdNxg8QxdEIU+XUu5ogr8Ha 57O0ww+6TsnTISKcFUKLrAVsKjXIGsm6kZrxuk7v41mQB+UKiia91B389zkvd/xHxTkw Owz7EmushrV+SvywgvWx6BOb6GDRS1G9t+tXOLxnZIReyqre15wTnrRBVHOAbWTS/XsL XcCA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=UGjmbTq4; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id hd12si5850879ejc.121.2021.07.14.23.52.41; Wed, 14 Jul 2021 23:52:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=UGjmbTq4; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236677AbhGOGzd (ORCPT + 17 others); Thu, 15 Jul 2021 02:55:33 -0400 Received: from mail.kernel.org ([198.145.29.99]:57720 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236519AbhGOGzd (ORCPT ); Thu, 15 Jul 2021 02:55:33 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 7A8ED6117A; Thu, 15 Jul 2021 06:52:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1626331960; bh=/PV3wN6sUlirZsizfYMWyjujG54WyuUyugANf3Z4nAA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UGjmbTq40pOIBu6V2A5nhipM/t9SWGW8nA2VEZ1LRhv27O6qSzlUNIu8rWZ5562/Z KoKf0+LuhJAoLASKqQ8jGXBNYlP9rnZPqe2LRM81SDWqzYwellbiRkLjtf256NLNfU tkj7l386jiqMCc+oYDRRrjN2HRzlCl6nMlaUdB54WXOBnS42W4mS1V0cZC3il3ym/r H3b/i0ei8Iv2/+1beykjQELw+Ed0zS+ip3nBq6u7KCyY96kwGdmRAGbBQSrb/B3XZB XaZEexqQRMJ31WWMnWi1aCta4bESLj0uXzAhISC6OKdznU5otIDjj2FcKdi7vAaUEr kEwzRw2SHT5Lw== From: Vinod Koul To: Rob Clark Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Vinod Koul , David Airlie , Daniel Vetter , Jonathan Marek , Dmitry Baryshkov , Abhinav Kumar , Jeffrey Hugo , Sumit Semwal , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH 03/11] drm/msm/disp/dpu1: Add support for DSC in pingpong block Date: Thu, 15 Jul 2021 12:21:55 +0530 Message-Id: <20210715065203.709914-4-vkoul@kernel.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210715065203.709914-1-vkoul@kernel.org> References: <20210715065203.709914-1-vkoul@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In SDM845, DSC can be enabled by writing to pingpong block registers, so add support for DSC in hw_pp Signed-off-by: Vinod Koul --- .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++++++++++++++++++ .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 14 ++++++++ 2 files changed, 46 insertions(+) -- 2.31.1 diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c index 245a7a62b5c6..07fc131ca9aa 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c @@ -28,6 +28,9 @@ #define PP_FBC_MODE 0x034 #define PP_FBC_BUDGET_CTL 0x038 #define PP_FBC_LOSSY_MODE 0x03C +#define PP_DSC_MODE 0x0a0 +#define PP_DCE_DATA_IN_SWAP 0x0ac +#define PP_DCE_DATA_OUT_SWAP 0x0c8 #define PP_DITHER_EN 0x000 #define PP_DITHER_BITDEPTH 0x004 @@ -245,6 +248,32 @@ static u32 dpu_hw_pp_get_line_count(struct dpu_hw_pingpong *pp) return line; } +static int dpu_hw_pp_dsc_enable(struct dpu_hw_pingpong *pp) +{ + struct dpu_hw_blk_reg_map *c = &pp->hw; + + DPU_REG_WRITE(c, PP_DSC_MODE, 1); + return 0; +} + +static void dpu_hw_pp_dsc_disable(struct dpu_hw_pingpong *pp) +{ + struct dpu_hw_blk_reg_map *c = &pp->hw; + + DPU_REG_WRITE(c, PP_DSC_MODE, 0); +} + +static int dpu_hw_pp_setup_dsc(struct dpu_hw_pingpong *pp) +{ + struct dpu_hw_blk_reg_map *pp_c = &pp->hw; + int data; + + data = DPU_REG_READ(pp_c, PP_DCE_DATA_OUT_SWAP); + data |= BIT(18); /* endian flip */ + DPU_REG_WRITE(pp_c, PP_DCE_DATA_OUT_SWAP, data); + return 0; +} + static void _setup_pingpong_ops(struct dpu_hw_pingpong *c, unsigned long features) { @@ -256,6 +285,9 @@ static void _setup_pingpong_ops(struct dpu_hw_pingpong *c, c->ops.get_autorefresh = dpu_hw_pp_get_autorefresh_config; c->ops.poll_timeout_wr_ptr = dpu_hw_pp_poll_timeout_wr_ptr; c->ops.get_line_count = dpu_hw_pp_get_line_count; + c->ops.setup_dsc = dpu_hw_pp_setup_dsc; + c->ops.enable_dsc = dpu_hw_pp_dsc_enable; + c->ops.disable_dsc = dpu_hw_pp_dsc_disable; if (test_bit(DPU_PINGPONG_DITHER, &features)) c->ops.setup_dither = dpu_hw_pp_setup_dither; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h index 845b9ce80e31..5058e41ffbc0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h @@ -124,6 +124,20 @@ struct dpu_hw_pingpong_ops { */ void (*setup_dither)(struct dpu_hw_pingpong *pp, struct dpu_hw_dither_cfg *cfg); + /** + * Enable DSC + */ + int (*enable_dsc)(struct dpu_hw_pingpong *pp); + + /** + * Disable DSC + */ + void (*disable_dsc)(struct dpu_hw_pingpong *pp); + + /** + * Setup DSC + */ + int (*setup_dsc)(struct dpu_hw_pingpong *pp); }; struct dpu_hw_pingpong {