@@ -273,13 +273,6 @@ memory@80000000 {
reg = <0x0 0x80000000 0x0 0x0>;
};
- mmcx_reg: mmcx-reg {
- compatible = "regulator-fixed-domain";
- power-domains = <&rpmhpd SM8250_MMCX>;
- required-opps = <&rpmhpd_opp_low_svs>;
- regulator-name = "MMCX";
- };
-
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
@@ -2451,7 +2444,7 @@ videocc: clock-controller@abf0000 {
clocks = <&gcc GCC_VIDEO_AHB_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>;
- mmcx-supply = <&mmcx_reg>;
+ power-domains = <&rpmhpd SM8250_MMCX>;
clock-names = "iface", "bi_tcxo", "bi_tcxo_ao";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -2720,7 +2713,7 @@ opp-358000000 {
dispcc: clock-controller@af00000 {
compatible = "qcom,sm8250-dispcc";
reg = <0 0x0af00000 0 0x10000>;
- mmcx-supply = <&mmcx_reg>;
+ power-domains = <&rpmhpd SM8250_MMCX>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&dsi0_phy 0>,
<&dsi0_phy 1>,