diff mbox series

[RFC,1/9] clk: qcom: qcc-sdm845: Collapse gdsc structs into macros

Message ID 20220726142303.4126434-2-abel.vesa@linaro.org
State New
Headers show
Series [RFC,1/9] clk: qcom: qcc-sdm845: Collapse gdsc structs into macros | expand

Commit Message

Abel Vesa July 26, 2022, 2:22 p.m. UTC
Collapse gdsc structs definitions into macros to make them
more compact visually.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
 drivers/clk/qcom/gcc-sdm845.c | 129 ++++------------------------------
 drivers/clk/qcom/gdsc.h       |  10 +++
 2 files changed, 23 insertions(+), 116 deletions(-)

Comments

Bjorn Andersson Aug. 9, 2022, 8:25 p.m. UTC | #1
On Tue 26 Jul 09:22 CDT 2022, Abel Vesa wrote:

> Collapse gdsc structs definitions into macros to make them
> more compact visually.
> 
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>  drivers/clk/qcom/gcc-sdm845.c | 129 ++++------------------------------
>  drivers/clk/qcom/gdsc.h       |  10 +++
>  2 files changed, 23 insertions(+), 116 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c
> index 58aa3ec9a7fc..8529e9c8c90c 100644
> --- a/drivers/clk/qcom/gcc-sdm845.c
> +++ b/drivers/clk/qcom/gcc-sdm845.c
> @@ -3191,122 +3191,19 @@ static struct clk_branch gcc_lpass_sway_clk = {
>  };
>  #endif
>  
> -static struct gdsc pcie_0_gdsc = {
> -	.gdscr = 0x6b004,
> -	.pd = {
> -		.name = "pcie_0_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = POLL_CFG_GDSCR,
> -};
> -
> -static struct gdsc pcie_1_gdsc = {
> -	.gdscr = 0x8d004,
> -	.pd = {
> -		.name = "pcie_1_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = POLL_CFG_GDSCR,
> -};
> -
> -static struct gdsc ufs_card_gdsc = {
> -	.gdscr = 0x75004,
> -	.pd = {
> -		.name = "ufs_card_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = POLL_CFG_GDSCR,
> -};
> -
> -static struct gdsc ufs_phy_gdsc = {
> -	.gdscr = 0x77004,
> -	.pd = {
> -		.name = "ufs_phy_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = POLL_CFG_GDSCR,
> -};
> -
> -static struct gdsc usb30_prim_gdsc = {
> -	.gdscr = 0xf004,
> -	.pd = {
> -		.name = "usb30_prim_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = POLL_CFG_GDSCR,
> -};
> -
> -static struct gdsc usb30_sec_gdsc = {
> -	.gdscr = 0x10004,
> -	.pd = {
> -		.name = "usb30_sec_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = POLL_CFG_GDSCR,
> -};
> -
> -static struct gdsc hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc = {
> -	.gdscr = 0x7d030,
> -	.pd = {
> -		.name = "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = VOTABLE,
> -};
> -
> -static struct gdsc hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc = {
> -	.gdscr = 0x7d03c,
> -	.pd = {
> -		.name = "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = VOTABLE,
> -};
> -
> -static struct gdsc hlos1_vote_aggre_noc_mmu_tbu1_gdsc = {
> -	.gdscr = 0x7d034,
> -	.pd = {
> -		.name = "hlos1_vote_aggre_noc_mmu_tbu1_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = VOTABLE,
> -};
> -
> -static struct gdsc hlos1_vote_aggre_noc_mmu_tbu2_gdsc = {
> -	.gdscr = 0x7d038,
> -	.pd = {
> -		.name = "hlos1_vote_aggre_noc_mmu_tbu2_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = VOTABLE,
> -};
> -
> -static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = {
> -	.gdscr = 0x7d040,
> -	.pd = {
> -		.name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = VOTABLE,
> -};
> -
> -static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc = {
> -	.gdscr = 0x7d048,
> -	.pd = {
> -		.name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = VOTABLE,
> -};
> -
> -static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf_gdsc = {
> -	.gdscr = 0x7d044,
> -	.pd = {
> -		.name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc",
> -	},
> -	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = VOTABLE,
> -};
> +DEFINE_QCOM_CC_GDSC(pcie_0_gdsc, 0x6b004, "pcie_0_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
> +DEFINE_QCOM_CC_GDSC(pcie_1_gdsc, 0x8d004, "pcie_1_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
> +DEFINE_QCOM_CC_GDSC(ufs_card_gdsc, 0x75004, "ufs_card_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
> +DEFINE_QCOM_CC_GDSC(ufs_phy_gdsc, 0x77004, "ufs_phy_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
> +DEFINE_QCOM_CC_GDSC(usb30_prim_gdsc, 0xf004, "usb30_prim_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
> +DEFINE_QCOM_CC_GDSC(usb30_sec_gdsc, 0x10004, "usb30_sec_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
> +DEFINE_QCOM_CC_GDSC(hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc, 0x7d030, "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc", PWRSTS_OFF_ON, VOTABLE);
> +DEFINE_QCOM_CC_GDSC(hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc, 0x7d03c, "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc", PWRSTS_OFF_ON, VOTABLE);
> +DEFINE_QCOM_CC_GDSC(hlos1_vote_aggre_noc_mmu_tbu1_gdsc, 0x7d034, "hlos1_vote_aggre_noc_mmu_tbu1_gdsc", PWRSTS_OFF_ON, VOTABLE);
> +DEFINE_QCOM_CC_GDSC(hlos1_vote_aggre_noc_mmu_tbu2_gdsc, 0x7d038, "hlos1_vote_aggre_noc_mmu_tbu2_gdsc", PWRSTS_OFF_ON, VOTABLE);
> +DEFINE_QCOM_CC_GDSC(hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc, 0x7d040, "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc", PWRSTS_OFF_ON, VOTABLE);
> +DEFINE_QCOM_CC_GDSC(hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc, 0x7d048, "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc", PWRSTS_OFF_ON, VOTABLE);
> +DEFINE_QCOM_CC_GDSC(hlos1_vote_mmnoc_mmu_tbu_sf_gdsc, 0x7d044, "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc", PWRSTS_OFF_ON, VOTABLE);

Personally I have a really hard time looking at such a compact chunk of
text and hence this is harder for me to spot mistakes and differences
in.

While I like the effort of making things easier to maintain this made me
further appreciate the change we've done in the interconnect providers,
where we're doing the exact opposite - and remove magical macros.

Regards,
Bjorn

>  
>  static struct clk_regmap *gcc_sdm845_clocks[] = {
>  	[GCC_AGGRE_NOC_PCIE_TBU_CLK] = &gcc_aggre_noc_pcie_tbu_clk.clkr,
> diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
> index 5de48c9439b2..c0e616b49dee 100644
> --- a/drivers/clk/qcom/gdsc.h
> +++ b/drivers/clk/qcom/gdsc.h
> @@ -78,6 +78,16 @@ struct gdsc_desc {
>  	size_t num;
>  };
>  
> +#define DEFINE_QCOM_CC_GDSC(_name, _gdscr, _pd_name, _pwrsts, _flags) \
> +	static struct gdsc _name = {			\
> +		.gdscr = _gdscr,		\
> +		.pd = {				\
> +			.name = _pd_name,	\
> +		},				\
> +		.pwrsts = _pwrsts,		\
> +		.flags = _flags,		\
> +	}
> +
>  #ifdef CONFIG_QCOM_GDSC
>  int gdsc_register(struct gdsc_desc *desc, struct reset_controller_dev *,
>  		  struct regmap *);
> -- 
> 2.34.3
>
Abel Vesa Aug. 10, 2022, 7:45 a.m. UTC | #2
On 22-08-09 15:25:39, Bjorn Andersson wrote:
> On Tue 26 Jul 09:22 CDT 2022, Abel Vesa wrote:
> 
> > Collapse gdsc structs definitions into macros to make them
> > more compact visually.
> > 
> > Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> > ---
> >  drivers/clk/qcom/gcc-sdm845.c | 129 ++++------------------------------
> >  drivers/clk/qcom/gdsc.h       |  10 +++
> >  2 files changed, 23 insertions(+), 116 deletions(-)
> > 
> > diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c
> > index 58aa3ec9a7fc..8529e9c8c90c 100644
> > --- a/drivers/clk/qcom/gcc-sdm845.c
> > +++ b/drivers/clk/qcom/gcc-sdm845.c
> > @@ -3191,122 +3191,19 @@ static struct clk_branch gcc_lpass_sway_clk = {
> >  };
> >  #endif
> >  
> > -static struct gdsc pcie_0_gdsc = {
> > -	.gdscr = 0x6b004,
> > -	.pd = {
> > -		.name = "pcie_0_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = POLL_CFG_GDSCR,
> > -};
> > -
> > -static struct gdsc pcie_1_gdsc = {
> > -	.gdscr = 0x8d004,
> > -	.pd = {
> > -		.name = "pcie_1_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = POLL_CFG_GDSCR,
> > -};
> > -
> > -static struct gdsc ufs_card_gdsc = {
> > -	.gdscr = 0x75004,
> > -	.pd = {
> > -		.name = "ufs_card_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = POLL_CFG_GDSCR,
> > -};
> > -
> > -static struct gdsc ufs_phy_gdsc = {
> > -	.gdscr = 0x77004,
> > -	.pd = {
> > -		.name = "ufs_phy_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = POLL_CFG_GDSCR,
> > -};
> > -
> > -static struct gdsc usb30_prim_gdsc = {
> > -	.gdscr = 0xf004,
> > -	.pd = {
> > -		.name = "usb30_prim_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = POLL_CFG_GDSCR,
> > -};
> > -
> > -static struct gdsc usb30_sec_gdsc = {
> > -	.gdscr = 0x10004,
> > -	.pd = {
> > -		.name = "usb30_sec_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = POLL_CFG_GDSCR,
> > -};
> > -
> > -static struct gdsc hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc = {
> > -	.gdscr = 0x7d030,
> > -	.pd = {
> > -		.name = "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = VOTABLE,
> > -};
> > -
> > -static struct gdsc hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc = {
> > -	.gdscr = 0x7d03c,
> > -	.pd = {
> > -		.name = "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = VOTABLE,
> > -};
> > -
> > -static struct gdsc hlos1_vote_aggre_noc_mmu_tbu1_gdsc = {
> > -	.gdscr = 0x7d034,
> > -	.pd = {
> > -		.name = "hlos1_vote_aggre_noc_mmu_tbu1_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = VOTABLE,
> > -};
> > -
> > -static struct gdsc hlos1_vote_aggre_noc_mmu_tbu2_gdsc = {
> > -	.gdscr = 0x7d038,
> > -	.pd = {
> > -		.name = "hlos1_vote_aggre_noc_mmu_tbu2_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = VOTABLE,
> > -};
> > -
> > -static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = {
> > -	.gdscr = 0x7d040,
> > -	.pd = {
> > -		.name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = VOTABLE,
> > -};
> > -
> > -static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc = {
> > -	.gdscr = 0x7d048,
> > -	.pd = {
> > -		.name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = VOTABLE,
> > -};
> > -
> > -static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf_gdsc = {
> > -	.gdscr = 0x7d044,
> > -	.pd = {
> > -		.name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc",
> > -	},
> > -	.pwrsts = PWRSTS_OFF_ON,
> > -	.flags = VOTABLE,
> > -};
> > +DEFINE_QCOM_CC_GDSC(pcie_0_gdsc, 0x6b004, "pcie_0_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
> > +DEFINE_QCOM_CC_GDSC(pcie_1_gdsc, 0x8d004, "pcie_1_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
> > +DEFINE_QCOM_CC_GDSC(ufs_card_gdsc, 0x75004, "ufs_card_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
> > +DEFINE_QCOM_CC_GDSC(ufs_phy_gdsc, 0x77004, "ufs_phy_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
> > +DEFINE_QCOM_CC_GDSC(usb30_prim_gdsc, 0xf004, "usb30_prim_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
> > +DEFINE_QCOM_CC_GDSC(usb30_sec_gdsc, 0x10004, "usb30_sec_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
> > +DEFINE_QCOM_CC_GDSC(hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc, 0x7d030, "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc", PWRSTS_OFF_ON, VOTABLE);
> > +DEFINE_QCOM_CC_GDSC(hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc, 0x7d03c, "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc", PWRSTS_OFF_ON, VOTABLE);
> > +DEFINE_QCOM_CC_GDSC(hlos1_vote_aggre_noc_mmu_tbu1_gdsc, 0x7d034, "hlos1_vote_aggre_noc_mmu_tbu1_gdsc", PWRSTS_OFF_ON, VOTABLE);
> > +DEFINE_QCOM_CC_GDSC(hlos1_vote_aggre_noc_mmu_tbu2_gdsc, 0x7d038, "hlos1_vote_aggre_noc_mmu_tbu2_gdsc", PWRSTS_OFF_ON, VOTABLE);
> > +DEFINE_QCOM_CC_GDSC(hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc, 0x7d040, "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc", PWRSTS_OFF_ON, VOTABLE);
> > +DEFINE_QCOM_CC_GDSC(hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc, 0x7d048, "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc", PWRSTS_OFF_ON, VOTABLE);
> > +DEFINE_QCOM_CC_GDSC(hlos1_vote_mmnoc_mmu_tbu_sf_gdsc, 0x7d044, "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc", PWRSTS_OFF_ON, VOTABLE);
> 
> Personally I have a really hard time looking at such a compact chunk of
> text and hence this is harder for me to spot mistakes and differences
> in.

Understood.

> 
> While I like the effort of making things easier to maintain this made me
> further appreciate the change we've done in the interconnect providers,
> where we're doing the exact opposite - and remove magical macros.

Lets ignore this patchset then.

> 
> Regards,
> Bjorn
> 
> >  
> >  static struct clk_regmap *gcc_sdm845_clocks[] = {
> >  	[GCC_AGGRE_NOC_PCIE_TBU_CLK] = &gcc_aggre_noc_pcie_tbu_clk.clkr,
> > diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
> > index 5de48c9439b2..c0e616b49dee 100644
> > --- a/drivers/clk/qcom/gdsc.h
> > +++ b/drivers/clk/qcom/gdsc.h
> > @@ -78,6 +78,16 @@ struct gdsc_desc {
> >  	size_t num;
> >  };
> >  
> > +#define DEFINE_QCOM_CC_GDSC(_name, _gdscr, _pd_name, _pwrsts, _flags) \
> > +	static struct gdsc _name = {			\
> > +		.gdscr = _gdscr,		\
> > +		.pd = {				\
> > +			.name = _pd_name,	\
> > +		},				\
> > +		.pwrsts = _pwrsts,		\
> > +		.flags = _flags,		\
> > +	}
> > +
> >  #ifdef CONFIG_QCOM_GDSC
> >  int gdsc_register(struct gdsc_desc *desc, struct reset_controller_dev *,
> >  		  struct regmap *);
> > -- 
> > 2.34.3
> >
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c
index 58aa3ec9a7fc..8529e9c8c90c 100644
--- a/drivers/clk/qcom/gcc-sdm845.c
+++ b/drivers/clk/qcom/gcc-sdm845.c
@@ -3191,122 +3191,19 @@  static struct clk_branch gcc_lpass_sway_clk = {
 };
 #endif
 
-static struct gdsc pcie_0_gdsc = {
-	.gdscr = 0x6b004,
-	.pd = {
-		.name = "pcie_0_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = POLL_CFG_GDSCR,
-};
-
-static struct gdsc pcie_1_gdsc = {
-	.gdscr = 0x8d004,
-	.pd = {
-		.name = "pcie_1_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = POLL_CFG_GDSCR,
-};
-
-static struct gdsc ufs_card_gdsc = {
-	.gdscr = 0x75004,
-	.pd = {
-		.name = "ufs_card_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = POLL_CFG_GDSCR,
-};
-
-static struct gdsc ufs_phy_gdsc = {
-	.gdscr = 0x77004,
-	.pd = {
-		.name = "ufs_phy_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = POLL_CFG_GDSCR,
-};
-
-static struct gdsc usb30_prim_gdsc = {
-	.gdscr = 0xf004,
-	.pd = {
-		.name = "usb30_prim_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = POLL_CFG_GDSCR,
-};
-
-static struct gdsc usb30_sec_gdsc = {
-	.gdscr = 0x10004,
-	.pd = {
-		.name = "usb30_sec_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = POLL_CFG_GDSCR,
-};
-
-static struct gdsc hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc = {
-	.gdscr = 0x7d030,
-	.pd = {
-		.name = "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = VOTABLE,
-};
-
-static struct gdsc hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc = {
-	.gdscr = 0x7d03c,
-	.pd = {
-		.name = "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = VOTABLE,
-};
-
-static struct gdsc hlos1_vote_aggre_noc_mmu_tbu1_gdsc = {
-	.gdscr = 0x7d034,
-	.pd = {
-		.name = "hlos1_vote_aggre_noc_mmu_tbu1_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = VOTABLE,
-};
-
-static struct gdsc hlos1_vote_aggre_noc_mmu_tbu2_gdsc = {
-	.gdscr = 0x7d038,
-	.pd = {
-		.name = "hlos1_vote_aggre_noc_mmu_tbu2_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = VOTABLE,
-};
-
-static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = {
-	.gdscr = 0x7d040,
-	.pd = {
-		.name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = VOTABLE,
-};
-
-static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc = {
-	.gdscr = 0x7d048,
-	.pd = {
-		.name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = VOTABLE,
-};
-
-static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf_gdsc = {
-	.gdscr = 0x7d044,
-	.pd = {
-		.name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc",
-	},
-	.pwrsts = PWRSTS_OFF_ON,
-	.flags = VOTABLE,
-};
+DEFINE_QCOM_CC_GDSC(pcie_0_gdsc, 0x6b004, "pcie_0_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
+DEFINE_QCOM_CC_GDSC(pcie_1_gdsc, 0x8d004, "pcie_1_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
+DEFINE_QCOM_CC_GDSC(ufs_card_gdsc, 0x75004, "ufs_card_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
+DEFINE_QCOM_CC_GDSC(ufs_phy_gdsc, 0x77004, "ufs_phy_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
+DEFINE_QCOM_CC_GDSC(usb30_prim_gdsc, 0xf004, "usb30_prim_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
+DEFINE_QCOM_CC_GDSC(usb30_sec_gdsc, 0x10004, "usb30_sec_gdsc", PWRSTS_OFF_ON, POLL_CFG_GDSCR);
+DEFINE_QCOM_CC_GDSC(hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc, 0x7d030, "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc", PWRSTS_OFF_ON, VOTABLE);
+DEFINE_QCOM_CC_GDSC(hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc, 0x7d03c, "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc", PWRSTS_OFF_ON, VOTABLE);
+DEFINE_QCOM_CC_GDSC(hlos1_vote_aggre_noc_mmu_tbu1_gdsc, 0x7d034, "hlos1_vote_aggre_noc_mmu_tbu1_gdsc", PWRSTS_OFF_ON, VOTABLE);
+DEFINE_QCOM_CC_GDSC(hlos1_vote_aggre_noc_mmu_tbu2_gdsc, 0x7d038, "hlos1_vote_aggre_noc_mmu_tbu2_gdsc", PWRSTS_OFF_ON, VOTABLE);
+DEFINE_QCOM_CC_GDSC(hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc, 0x7d040, "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc", PWRSTS_OFF_ON, VOTABLE);
+DEFINE_QCOM_CC_GDSC(hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc, 0x7d048, "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc", PWRSTS_OFF_ON, VOTABLE);
+DEFINE_QCOM_CC_GDSC(hlos1_vote_mmnoc_mmu_tbu_sf_gdsc, 0x7d044, "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc", PWRSTS_OFF_ON, VOTABLE);
 
 static struct clk_regmap *gcc_sdm845_clocks[] = {
 	[GCC_AGGRE_NOC_PCIE_TBU_CLK] = &gcc_aggre_noc_pcie_tbu_clk.clkr,
diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
index 5de48c9439b2..c0e616b49dee 100644
--- a/drivers/clk/qcom/gdsc.h
+++ b/drivers/clk/qcom/gdsc.h
@@ -78,6 +78,16 @@  struct gdsc_desc {
 	size_t num;
 };
 
+#define DEFINE_QCOM_CC_GDSC(_name, _gdscr, _pd_name, _pwrsts, _flags) \
+	static struct gdsc _name = {			\
+		.gdscr = _gdscr,		\
+		.pd = {				\
+			.name = _pd_name,	\
+		},				\
+		.pwrsts = _pwrsts,		\
+		.flags = _flags,		\
+	}
+
 #ifdef CONFIG_QCOM_GDSC
 int gdsc_register(struct gdsc_desc *desc, struct reset_controller_dev *,
 		  struct regmap *);