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[2001:14bb:ae:539c:1b1c:14b7:109b:ed76]) by smtp.gmail.com with ESMTPSA id d15-20020a05651221cf00b0048a97042251sm1670496lft.22.2022.08.17.05.04.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Aug 2022 05:04:17 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Lee Jones , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [RFT PATCH 03/14] arm64: dts: qcom: msm8996: switch TCSR mutex to MMIO Date: Wed, 17 Aug 2022 15:03:52 +0300 Message-Id: <20220817120403.458000-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220817120403.458000-1-krzysztof.kozlowski@linaro.org> References: <20220817120403.458000-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/msm8996-xiaomi-natrium.dtb: hwlock: 'reg' is a required property qcom/msm8996-xiaomi-natrium.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 3411ced96db6..166374566a49 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -363,12 +363,6 @@ scm { }; }; - tcsr_mutex: hwlock { - compatible = "qcom,tcsr-mutex"; - syscon = <&tcsr_mutex_regs 0 0x1000>; - #hwlock-cells = <1>; - }; - memory@80000000 { device_type = "memory"; /* We expect the bootloader to fill in the reg */ @@ -838,9 +832,10 @@ pnoc: interconnect@5c0000 { <&rpmcc RPM_SMD_PCNOC_A_CLK>; }; - tcsr_mutex_regs: syscon@740000 { - compatible = "syscon"; + tcsr_mutex: hwlock@740000 { + compatible = "qcom,tcsr-mutex"; reg = <0x00740000 0x20000>; + #hwlock-cells = <1>; }; tcsr_1: sycon@760000 {