From patchwork Wed Sep 28 23:10:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 610126 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42F34C04A95 for ; Wed, 28 Sep 2022 23:10:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234023AbiI1XKn (ORCPT ); Wed, 28 Sep 2022 19:10:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50946 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234253AbiI1XKf (ORCPT ); Wed, 28 Sep 2022 19:10:35 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2ECE4C60A for ; Wed, 28 Sep 2022 16:10:32 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id a8so22521143lff.13 for ; Wed, 28 Sep 2022 16:10:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=bBleQqpHTorXjkfdMp9ADhfccQLxPaCPN1KQqTkgy1s=; b=Q7HJObxn1LBEh0NWEishjQdgx9kVPgzOyR167X72itC8hBeLjFngX6q2LdZ2B1NS0F v8SjyhRTLm8S8YLtjPYSgBj4idpE7xiX1P81C/ZfBoubWFMAFvLLGqUzwYcsb3/H5FrJ oLzJ2xmcH333phHqb2DmOHgFCCA3B7jTPLWrPjs2uNzuGWRe2NMYTeZtFKxOJbyxgkZQ 99EK5xlVJOounnNlrxNGHQZ02o1PG7ulTJF3KVHI4eomoqWEWYCT9u7iPyGOUpLbLJfA kdaGXVRaTWlr/5ayGCV4n4mmVtnUny2O7WeYinxjot4O1LDPWCKPmIlv+1h/sMfz7KxD btWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=bBleQqpHTorXjkfdMp9ADhfccQLxPaCPN1KQqTkgy1s=; b=sOx+HhRL+HLttu1yrDugMh97saLOqsbry5j5yxmIyxi+LI6eM6tvVKicsTdUCgsoGe 5+gUTZmF33ZPPOOv79/o+WQi+nusYnVcYiPsHKKVvREGqQHbQiEXky/rrkjwsCdNjU7/ jEpTDVsAgjuM4Z6CBl81AVjZKsOCzeSFJ5OcTILsdOMhBBvnGojvgP1U34ZSadM0Jg7y pN1hi/UWj63EL9CZ4raCXKSRaubXs5VE0Hk6IQUCpVQh8d4HvmW9m42vuuk+tiHOEuX5 1eALZR379/h9BU/dlc09gYgS+MEcU5kth5XNoLeEYuPeRG0AWNCEzjuJptKzaDx+tUvs iWfA== X-Gm-Message-State: ACrzQf3OL6GJxGbPefklBmwq4Pty6f95Cw7fUkNkknMl0/bRGfo+mnVi SwMRS4CTir9zu7b27A66C6nLgg== X-Google-Smtp-Source: AMsMyM7J6q1FxgW51WqE1zvLRf3Qszwqpbf7aqsoKaQ6fhfMZwl4J6AfjhAJVr/y8xuL0bV59oZSxA== X-Received: by 2002:ac2:5317:0:b0:4a1:abe3:93c3 with SMTP id c23-20020ac25317000000b004a1abe393c3mr102174lfh.527.1664406632336; Wed, 28 Sep 2022 16:10:32 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id o16-20020ac24950000000b0049d5733fb3fsm597587lfi.212.2022.09.28.16.10.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Sep 2022 16:10:31 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I Cc: Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, Johan Hovold Subject: [PATCH 18/18] phy: qcom-qmp: move type-specific headers to particular driver Date: Thu, 29 Sep 2022 02:10:14 +0300 Message-Id: <20220928231014.455201-19-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220928231014.455201-1-dmitry.baryshkov@linaro.org> References: <20220928231014.455201-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Remove QMP PHY type-specific headers inclusion from the common header and move them to the specific PHY drivers to cleanup the namespaces used by different drivers. Signed-off-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 3 +++ drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 6 ++++++ drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 4 ++++ drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 3 +++ drivers/phy/qualcomm/phy-qcom-qmp.h | 14 -------------- 5 files changed, 16 insertions(+), 14 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 7cc53765b300..924588c09a19 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -23,6 +23,9 @@ #include #include "phy-qcom-qmp.h" +#include "phy-qcom-qmp-pcs-misc-v3.h" +#include "phy-qcom-qmp-pcs-usb-v4.h" +#include "phy-qcom-qmp-pcs-usb-v5.h" /* QPHY_SW_RESET bit */ #define SW_RESET BIT(0) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index 688d9eb78a82..73fd5af50c85 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -23,6 +23,12 @@ #include #include "phy-qcom-qmp.h" +#include "phy-qcom-qmp-pcs-misc-v3.h" +#include "phy-qcom-qmp-pcs-pcie-v4.h" +#include "phy-qcom-qmp-pcs-pcie-v4_20.h" +#include "phy-qcom-qmp-pcs-pcie-v5.h" +#include "phy-qcom-qmp-pcs-pcie-v5_20.h" +#include "phy-qcom-qmp-pcie-qhp.h" /* QPHY_SW_RESET bit */ #define SW_RESET BIT(0) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c index 593173167b8a..709b3e511bcb 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c @@ -23,6 +23,10 @@ #include #include "phy-qcom-qmp.h" +#include "phy-qcom-qmp-pcs-ufs-v2.h" +#include "phy-qcom-qmp-pcs-ufs-v3.h" +#include "phy-qcom-qmp-pcs-ufs-v4.h" +#include "phy-qcom-qmp-pcs-ufs-v5.h" /* QPHY_SW_RESET bit */ #define SW_RESET BIT(0) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c index 1d1cfcfd7c52..e3273afe7920 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c @@ -23,6 +23,9 @@ #include #include "phy-qcom-qmp.h" +#include "phy-qcom-qmp-pcs-misc-v3.h" +#include "phy-qcom-qmp-pcs-usb-v4.h" +#include "phy-qcom-qmp-pcs-usb-v5.h" /* QPHY_SW_RESET bit */ #define SW_RESET BIT(0) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy-qcom-qmp.h index e6f327acbf19..08a3eccaeadc 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp.h @@ -24,28 +24,14 @@ #include "phy-qcom-qmp-qserdes-pll.h" #include "phy-qcom-qmp-pcs-v2.h" -#include "phy-qcom-qmp-pcs-ufs-v2.h" #include "phy-qcom-qmp-pcs-v3.h" -#include "phy-qcom-qmp-pcs-misc-v3.h" -#include "phy-qcom-qmp-pcs-ufs-v3.h" #include "phy-qcom-qmp-pcs-v4.h" -#include "phy-qcom-qmp-pcs-pcie-v4.h" -#include "phy-qcom-qmp-pcs-usb-v4.h" -#include "phy-qcom-qmp-pcs-ufs-v4.h" #include "phy-qcom-qmp-pcs-v4_20.h" -#include "phy-qcom-qmp-pcs-pcie-v4_20.h" #include "phy-qcom-qmp-pcs-v5.h" -#include "phy-qcom-qmp-pcs-pcie-v5.h" -#include "phy-qcom-qmp-pcs-usb-v5.h" -#include "phy-qcom-qmp-pcs-ufs-v5.h" - -#include "phy-qcom-qmp-pcs-pcie-v5_20.h" - -#include "phy-qcom-qmp-pcie-qhp.h" /* Only for QMP V3 & V4 PHY - DP COM registers */ #define QPHY_V3_DP_COM_PHY_MODE_CTRL 0x00