From patchwork Fri Mar 24 02:24:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 667003 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C0F2C6FD1C for ; Fri, 24 Mar 2023 02:25:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231173AbjCXCZg (ORCPT ); Thu, 23 Mar 2023 22:25:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231189AbjCXCZe (ORCPT ); Thu, 23 Mar 2023 22:25:34 -0400 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F9C829E21 for ; Thu, 23 Mar 2023 19:25:32 -0700 (PDT) Received: by mail-lf1-x12b.google.com with SMTP id g17so412048lfv.4 for ; Thu, 23 Mar 2023 19:25:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679624732; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DVQJSw3oh16U7ACIlQhI1Q/1xm7ZtJnl5AYCL8XocMk=; b=g9Veu/sTI5uBlxTdrJee/UF83PFVMQV6RNFZTzLOSjepOADDsTnIihZqCyLK07LCC1 MmI0AHg8W549hVfu/Tub8+YbyJUFgtj1lziXDmEMbftF7sEcYkaFhK7vJcHoBAr6aais ZW71K0gdAYEs6+FbsCJQkL93dQsGpdkzPSwm6Ejn13kyZqcB7jhs2esgKtGojgLgGf7D j9nrURQdwtUH3wtrNkA1EhDGOu8qwOlA45teN88zuN7eKEsqE1ygU79bCEjf43uoB0Tt Dr+NFRVEYThrNahw/hN55jQEKpZa5nXWre8lwCpepUX3MYRaqhW11Egp2zW0Um2yrzVp 2TUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679624732; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DVQJSw3oh16U7ACIlQhI1Q/1xm7ZtJnl5AYCL8XocMk=; b=3C+f1YlVcD+f1/stk42fAsVb9cTdS8Tw5RdEcBqsHgHmnhv26X2meUFHj9T1atycYu DdAzuO6B3h2UKVK95SXMys56WGBXM3sShyIyUBS2AINHEO6vp4+zMt+w3drxEVW+9WvB N9rG5koc2UimcNfYSO1LQ9A+V5oQZ7iy0RpctzUe3GGcwRnMINjhvG7o3Fh1zvRdCqhm fBIuEekVNBcQxafBorX0q1rWn7i6kJ4J1TDn7K0EJiNdgFu2mlFRPWvjqGCC/2vPexsp e9/5jj73LB9pQdh2m1ARrr3qBJpmSOZYqkgAyrcRv+QSMPJN95zKp6z5W8VaA31WVzF5 EWaA== X-Gm-Message-State: AAQBX9cnVe5OxLcN2AtVi744R+nogqMev6L/afgzemUaTpMlfsSd8cO4 7vK6RbEWwPhgmAHkxqXiVtpqGA== X-Google-Smtp-Source: AKy350aPtyi4sUmE2SdwdtRdAhZmA5Mf+lG+QoGqicUtvel0D3flsEIW1p14pA05jxbrUt6khEozLw== X-Received: by 2002:ac2:5a46:0:b0:4b5:26f3:2247 with SMTP id r6-20020ac25a46000000b004b526f32247mr199036lfn.69.1679624731873; Thu, 23 Mar 2023 19:25:31 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id x4-20020a19f604000000b004db3aa3c542sm3162628lfe.47.2023.03.23.19.25.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 19:25:31 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, Johan Hovold Subject: [PATCH 15/41] arm64: dts: qcom: sm8150: switch USB QMP PHY to new style of bindings Date: Fri, 24 Mar 2023 05:24:48 +0300 Message-Id: <20230324022514.1800382-16-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230324022514.1800382-1-dmitry.baryshkov@linaro.org> References: <20230324022514.1800382-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 67 +++++++++++----------------- 1 file changed, 25 insertions(+), 42 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 9491be4a6bf0..c29bbd5c6fd5 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3391,69 +3391,52 @@ usb_2_hsphy: phy@88e3000 { resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; }; - usb_1_qmpphy: phy@88e9000 { + usb_1_qmpphy: phy@88e8000 { compatible = "qcom,sm8150-qmp-usb3-phy"; - reg = <0 0x088e9000 0 0x18c>, - <0 0x088e8000 0 0x10>; + reg = <0 0x088e8000 0 0x3000>; status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_USB3_PRIM_CLKREF_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "ref", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", + "ref_clk_src", + "ref", + "com_aux", + "pipe"; + clock-output-names = "usb3_phy_pipe_clk_src"; + #clock-cells = <0>; + #phy-cells = <0>; resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_BCR>; reset-names = "phy", "common"; - - usb_1_ssphy: phy@88e9200 { - reg = <0 0x088e9200 0 0x200>, - <0 0x088e9400 0 0x200>, - <0 0x088e9c00 0 0x218>, - <0 0x088e9600 0 0x200>, - <0 0x088e9800 0 0x200>, - <0 0x088e9a00 0 0x100>; - #clock-cells = <0>; - #phy-cells = <0>; - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb3_phy_pipe_clk_src"; - }; }; usb_2_qmpphy: phy@88eb000 { compatible = "qcom,sm8150-qmp-usb3-uni-phy"; - reg = <0 0x088eb000 0 0x200>; + reg = <0 0x088eb000 0 0x1000>; status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_USB3_SEC_CLKREF_CLK>, - <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "ref", "com_aux"; + <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; + clock-names = "aux", + "ref_clk_src", + "ref", + "com_aux", + "pipe"; + clock-output-names = "usb3_uni_phy_pipe_clk_src"; + #clock-cells = <0>; + #phy-cells = <0>; resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, <&gcc GCC_USB3_PHY_SEC_BCR>; reset-names = "phy", "common"; - - usb_2_ssphy: phy@88eb200 { - reg = <0 0x088eb200 0 0x200>, - <0 0x088eb400 0 0x200>, - <0 0x088eb800 0 0x800>, - <0 0x088eb600 0 0x200>; - #clock-cells = <0>; - #phy-cells = <0>; - clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb3_uni_phy_pipe_clk_src"; - }; }; sdhc_2: mmc@8804000 { @@ -3559,7 +3542,7 @@ usb_1_dwc3: usb@a600000 { iommus = <&apps_smmu 0x140 0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; - phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy>; phy-names = "usb2-phy", "usb3-phy"; }; }; @@ -3608,7 +3591,7 @@ usb_2_dwc3: usb@a800000 { iommus = <&apps_smmu 0x160 0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; - phys = <&usb_2_hsphy>, <&usb_2_ssphy>; + phys = <&usb_2_hsphy>, <&usb_2_qmpphy>; phy-names = "usb2-phy", "usb3-phy"; }; };