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[83.9.31.195]) by smtp.gmail.com with ESMTPSA id y23-20020a2e7d17000000b002b94b355527sm2602662ljc.32.2023.08.30.05.48.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Aug 2023 05:48:53 -0700 (PDT) From: Konrad Dybcio Date: Wed, 30 Aug 2023 14:48:45 +0200 Subject: [PATCH 6/7] arm64: dts: qcom: sm8550: Add missing DWC3 quirks MIME-Version: 1.0 Message-Id: <20230830-topic-8550_dmac2-v1-6-49bb25239fb1@linaro.org> References: <20230830-topic-8550_dmac2-v1-0-49bb25239fb1@linaro.org> In-Reply-To: <20230830-topic-8550_dmac2-v1-0-49bb25239fb1@linaro.org> To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Abel Vesa , Neil Armstrong , Sai Prakash Ranjan , Vinod Koul Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1693399725; l=1404; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=jj9VVwygDZqQ39oRSM4g+RTt+SnGK4NeCXuTCm1OBo8=; b=Kcv2F6CZvKpkJBpMmgtDhALkq3Ni5KrCdIjwfcSr8Jl4ayer/gFPHk2spEc/Ew3HDGr3yhRBV /T9CqVnJJFTD81Nh28WTF2b6aYfnTB4sBVQAVujc8L/jMy92Ua9r9Az X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org As expected, Qualcomm DWC3 implementation come with a sizable number of quirks. Make sure to account for all of them. Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes") Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 944b4b8c95f5..8ee61c9383ec 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -2930,12 +2930,20 @@ usb_1_dwc3: usb@a600000 { reg = <0x0 0x0a600000 0x0 0xcd00>; interrupts = ; iommus = <&apps_smmu 0x40 0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_enblslpm_quirk; - snps,usb3_lpm_capable; phys = <&usb_1_hsphy>, <&usb_dp_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,usb2-gadget-lpm-disable; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + snps,is-utmi-l1-suspend; + snps,usb3_lpm_capable; + snps,usb2-lpm-disable; + snps,has-lpm-erratum; + tx-fifo-resize; ports { #address-cells = <1>;