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[98.61.227.136]) by smtp.gmail.com with ESMTPSA id et21-20020a0566382a1500b004665cf3e94dsm937031jab.2.2023.11.24.10.17.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Nov 2023 10:17:22 -0800 (PST) From: Alex Elder To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, agross@kernel.org Cc: mka@chromium.org, quic_cpratapa@quicinc.com, quic_avuyyuru@quicinc.com, quic_jponduru@quicinc.com, quic_subashab@quicinc.com, elder@kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] arm64: dts: qcom: sm8550: add IPA information Date: Fri, 24 Nov 2023 12:17:17 -0600 Message-Id: <20231124181718.915208-2-elder@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231124181718.915208-1-elder@linaro.org> References: <20231124181718.915208-1-elder@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add IPA-related nodes and definitions to "sm8550.dtsi", which uses IPA v5.5. Signed-off-by: Alex Elder --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 39 ++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 7bafb3d88d69b..4d28150c985b5 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1995,6 +1995,45 @@ gpucc: clock-controller@3d90000 { #power-domain-cells = <1>; }; + ipa: ipa@3f40000 { + compatible = "qcom,sm8550-ipa"; + + iommus = <&apps_smmu 0x4a0 0x0>, + <&apps_smmu 0x4a2 0x0>; + reg = <0 0x3f40000 0 0x10000>, + <0 0x3f50000 0 0x5000>, + <0 0x3e04000 0 0xfc000>; + reg-names = "ipa-reg", + "ipa-shared", + "gsi"; + + interrupts-extended = <&intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>, + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "ipa", + "gsi", + "ipa-clock-query", + "ipa-setup-ready"; + + clocks = <&rpmhcc RPMH_IPA_CLK>; + clock-names = "core"; + + interconnects = <&aggre2_noc MASTER_IPA 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>; + interconnect-names = "memory", + "config"; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&ipa_smp2p_out 0>, + <&ipa_smp2p_out 1>; + qcom,smem-state-names = "ipa-clock-enabled-valid", + "ipa-clock-enabled"; + + status = "disabled"; + }; + remoteproc_mpss: remoteproc@4080000 { compatible = "qcom,sm8550-mpss-pas"; reg = <0x0 0x04080000 0x0 0x4040>;